5秒后页面跳转
932S208YGLNT PDF预览

932S208YGLNT

更新时间: 2024-02-05 18:05:38
品牌 Logo 应用领域
艾迪悌 - IDT 晶体时钟发生器微控制器和处理器外围集成电路光电二极管
页数 文件大小 规格书
21页 153K
描述
Programmable Timing Control HubTM for Next Gen P4TM Processor

932S208YGLNT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP,针数:56
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.78
Is Samacsys:NJESD-30 代码:R-PDSO-G56
JESD-609代码:e3长度:18.43 mm
端子数量:56最高工作温度:70 °C
最低工作温度:最大输出时钟频率:400 MHz
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260主时钟/晶体标称频率:14.31818 MHz
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:6.1 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFICBase Number Matches:1

932S208YGLNT 数据手册

 浏览型号932S208YGLNT的Datasheet PDF文件第2页浏览型号932S208YGLNT的Datasheet PDF文件第3页浏览型号932S208YGLNT的Datasheet PDF文件第4页浏览型号932S208YGLNT的Datasheet PDF文件第5页浏览型号932S208YGLNT的Datasheet PDF文件第6页浏览型号932S208YGLNT的Datasheet PDF文件第7页 
DATASHEET  
Programmable Timing Control HubTM for Next  
Gen P4TM Processor  
ICS932S208  
Features/Benefits:  
Recommended Application:  
Supports tight ppm accuracy clocks for Serial-ATA  
Supports spread spectrum modulation, 0 to -0.5%  
down spread and +/- 0.25% center spread  
CK409B clock, Intel Yellow Cover part, Server Applications  
Output Features:  
4 - 0.7V current-mode differential CPU pairs  
1 - 0.7V current-mode differential SRC pair  
7 - PCI (33MHz)  
3 - PCICLK_F, (33MHz) free-running  
1 - USB, 48MHz  
1 - DOT, 48MHz  
2 - REF, 14.318MHz  
4 - 3V66, 66.66MHz  
1 - VCH/3V66, selectable 48MHz or 66MHz  
Supports CPU clks up to 400MHz in test mode  
Uses external 14.318MHz crystal  
Pin Configuration  
REF0  
1
2
3
4
5
6
7
8
9
56 FS_B  
55 VDDA  
54 GNDA  
53 GND  
52 IREF  
51 FS_A  
50 CPUCLKT3  
49 CPUCLKC3  
48 VDDCPU  
47 CPUCLKT2  
46 CPUCLKC2  
45 GND  
44 CPUCLKT1  
43 CPUCLKC1  
42 VDDCPU  
41 CPUCLKT0  
40 CPUCLKC0  
39 GND  
REF1  
VDDREF  
X1  
X2  
GND  
PCICLK_F0  
PCICLK_F1  
PCICLK_F2  
Key Specifications:  
CPU/SRC outputs cycle-cycle jitter < 125ps  
3V66 outputs cycle-cycle jitter < 250ps  
PCI outputs cycle-cycle jitter < 250ps  
CPU outputs skew: < 100ps  
VDDPCI 10  
GND 11  
+/- 300ppm frequency accuracy on CPU & SRC clocks  
PCICLK0 12  
PCICLK1 13  
PCICLK2 14  
PCICLK3 15  
VDDPCI 16  
GND 17  
PCICLK4 18  
PCICLK5 19  
PCICLK6 20  
PD# 21  
Functionality  
CPU  
B6b5 FS_A FS_B MHz  
SRC  
MHz  
3V66 PCI  
MHz MHz  
REF USB/DOT  
MHz  
MHz  
48.00  
Ref/N5  
48.00  
48.00  
48.00  
Hi-Z  
48.00  
48.00  
48.00  
48.00  
0
0
0
1
1
1
0
0
1
1
0
100 100/200 66.66 33.33 14.318  
MID Ref/N0 Ref/N1 Ref/N2 Ref/N3 Ref/N4  
1
0
1
200 100/200 66.66 33.33 14.318  
133 100/200 66.66 33.33 14.318  
166 100/200 66.66 33.33 14.318  
0
1
38 SRCCLKT  
37 SRCCLKC  
36 VDD  
MID Hi-Z  
Hi-Z  
Hi-Z  
Hi-Z  
Hi-Z  
0
1
0
1
200 100/200 66.66 33.33 14.318  
400 100/200 66.66 33.33 14.318  
266 100/200 66.66 33.33 14.318  
333 100/200 66.66 33.33 14.318  
3V66_0 22  
3V66_1 23  
VDD3V66 24  
GND 25  
3V66_2 26  
3V66_3 27  
SCLK 28  
35 Vtt_PWRGD#  
34 VDD48  
33 GND  
32 48MHz_DOT  
31 48MHz_USB  
30 SDATA  
29 3V66_4/VCH  
56-pin SSOP & TSSOP  
IDTTM Programmable Timing Control HubTM for Next Gen P4TM Processor  
0743G—01/26/10  
1

与932S208YGLNT相关器件

型号 品牌 描述 获取价格 数据表
932S421BFLF IDT PCIe Gen2 and QPI Clock for Intel-Based Servers

获取价格

932S421BFLFT IDT PCIe Gen2 and QPI Clock for Intel-Based Servers

获取价格

932S421BFT IDT Clock Generator, PDSO56

获取价格

932S421BGLF IDT PCIe Gen2 and QPI Clock for Intel-Based Servers

获取价格

932S421BGLFT IDT PCIe Gen2 and QPI Clock for Intel-Based Servers

获取价格

932S421BGT IDT Clock Generator, PDSO56

获取价格