91305AGILFT

更新时间： 2024-01-04 19:00:17

品牌	Logo	应用领域
艾迪悌 - IDT		通信
页数	文件大小	规格书
9页	163K
描述
HIGH PERFORMANCE COMMUNICATION BUFFER Zero input - output delay

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91305AGILFT 数据手册

DATASHEET

HIGH PERFORMANCE COMMUNICATION BUFFER

ICS91305I

Description

Features

The ICS91305I is a high performance, low skew, low jitter

clock driver. It uses a phase lock loop (PLL) technology to

align, in both phase and frequency, the REF input with the

CLKOUT signal. It is designed to distribute high speed

clocks in communication systems operating at speeds from

10 to 133 MHz.

• Zero input - output delay

• Frequency range 10 - 133 MHz (3.3V)

• 5V tolerant input REF

• High loop filter bandwidth ideal for Spread Spectrum

applications

• Less than 200 ps Jitter between outputs

• Skew controlled outputs

ICS91305I is a zero delay buffer that provides

synchronization between the input and output. The

synchronization is established via CLKOUT feed back to the

input of the PLL. Since the skew between the input and

output is less than +/- 350 pS, the part acts as a zero delay

buffer.

• Skew less than 250 ps between outputs

• Available in 8 pin 150 mil SOIC & 173 mil TSSOP

packages

• 3.3V 10% operation

The ICS91305I comes in an eight pin 150 mil SOIC

package. It has five output clocks. In the absence of REF

input, will be in the power down mode. In this mode, the PLL

is turned off and the output buffers are pulled low. Power

down mode provides the lowest power consumption for a

standby condition.

• Supports industrial temperature range -40°C to 85°C

Block Diagram

IDT® HIGH PERFORMANCE COMMUNICATION BUFFER

ICS91305I

REV G 090612

12 3 4 5 6 7...9

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与91305AGILFT相关器件

型号	品牌	描述	获取价格	数据表
91305AGT	IDT	Clock Driver	获取价格
91305AM	IDT	PLL Based Clock Driver, 91305 Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, 0.150	获取价格
91305AMI	IDT	PLL Based Clock Driver, 91305 Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, 0.150	获取价格
91305AMILF	IDT	HIGH PERFORMANCE COMMUNICATION BUFFER Zero input - output delay	获取价格
91305AMILFT	IDT	HIGH PERFORMANCE COMMUNICATION BUFFER Zero input - output delay	获取价格
91305AMIT	IDT	PLL Based Clock Driver, 91305 Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, 0.150	获取价格