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87951AYILFT PDF预览

87951AYILFT

更新时间: 2024-02-15 17:16:19
品牌 Logo 应用领域
艾迪悌 - IDT 时钟驱动器逻辑集成电路
页数 文件大小 规格书
14页 186K
描述
LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY BUFFER

87951AYILFT 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:QFP
包装说明:7 X 7 MM, 1.40 MM HEIGHT, MS-026BBA, LQFP-32针数:32
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.49
Is Samacsys:N其他特性:ALSO OPERATES AT 3.3V SUPPLY
系列:87951输入调节:DIFFERENTIAL MUX
JESD-30 代码:S-PQFP-G32JESD-609代码:e0
长度:7 mm逻辑集成电路类型:PLL BASED CLOCK DRIVER
最大I(ol):0.04 A湿度敏感等级:3
功能数量:1反相输出次数:
端子数量:32实输出次数:9
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装等效代码:QFP32,.35SQ,32
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
峰值回流温度(摄氏度):240电源:3.3 V
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.75 ns
座面最大高度:1.6 mm子类别:Clock Drivers
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD处于峰值回流温度下的最长时间:20
宽度:7 mm最小 fmax:180 MHz
Base Number Matches:1

87951AYILFT 数据手册

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ICS87951I  
LOW SKEW, 1-TO-9  
DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY BUFFER  
FEATURES  
GENERAL DESCRIPTION  
Fully integrated PLL  
The ICS87951I is a low voltage, low skew 1-to-9  
Differential-to-LVCMOS/LVTTL Cock Generator. The  
CS87951I has two selectable clock inputs. The single ended  
clock input accepts LVCMOS or LVTTL input  
levels. The CLK1, nCLK1 pair can accept most standard  
differential input levels. With output frequencies up to 180MHz,  
the ICS87951I is targeted for high performance clock appli-  
cations. Along with a fully integrated PLL, the ICS87951I con-  
tains frequency configurable outputs and an external  
feedback input for regenerating clocks with “zero delay”.  
Nine single ended 3.3V LVCMOS/LVTTL outputs  
Selectable single ended CLK0 or differential  
CLK1, nCLK1 inputs  
The single ended CLK0 input can accept the following  
input levels: LVCMOS or LVTTL input levels  
CLK1, nCLK1 supports the following input types:  
LVDS, LVPECL, LVHSTL, SSTL, HCSL  
Output frequency range: 25MHz to 180MHz  
VCO range: 200MHz to 480MHz  
External feedback for ”zero delay” clock regeneration  
Cycle-to-cycle jitter: 100ps ꢀtypicalꢁ  
Output skew: 375ps ꢀmaximumꢁ  
PLL reference zero delay: 350ps window ꢀmaximumꢁ  
3.3V operating supply  
-40°C to 85°C ambient operating temperature  
Available in both standard and lead-free RoHS-compliant  
packages  
PIN ASSIGNMENT  
32 31 30 29 28 27 26 25  
VDDA  
EXT_FB  
DIV_SELA  
DIV_SELB  
DIV_SELC  
DIV_SELD  
GND  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
QC0  
VDDO  
QC1  
GND  
QD0  
VDDO  
QD1  
GND  
ICS87951I  
CLK1  
9
10 11 12 13 14 15 16  
32-Lead LQFP  
7mm x 7mm x 1.4mm package body  
Y package  
Top View  
87951AYI  
www.idt.com  
REV. C JULY 17, 2010  
1

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