Low Skew, 1-to-6, Dual Crystal/LVCMOS-to-
3.3V, 2.5V LVPECL Fanout Buffer
ICS8536-02
DATA SHEET
General Description
Features
The ICS8536-02 is a low skew, high performance 1-to-6, Dual
Crystal or LVCMOS Input-to-3.3V, 2.5V LVPECL Fanout Buffer. The
ICS8536-02 has selectable crystal or single ended clock input. The
single ended clock input accepts LVCMOS or LVTTL input levels and
translates them to LVPECL levels. The output enable is internally
synchronized to eliminate runt pulses on the outputs during
asynchronous assertion/deassertion of the clock enable pin.
• Six 3.3V, 2.5V differential LVPECL output pairs
• Selectable crystal oscillator interface
or LVCMOS/LVTTL single-ended input
• Maximum output frequency: 266MHz
• Crystal frequency range: 14MHz – 40MHz
• Output skew: 55ps (maximum)
• Part-to-part skew: 500ps (maximum)
Guaranteed output and part-to-part skew characteristics make the
ICS8536-02 ideal for those applications demanding well defined
performance and repeatability.
• Propagation delay: 1.85ns (maximum), 3.3V
• Additive phase jitter, RMS: 0.149ps (typical)
• Full 3.3V or 2.5V supply modes
• 0°C to 70°C ambient operating temperature
• Industrial temperature information available upon request
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
Pin Assignment
Block Diagram
Pullup
CLK_EN
D
1
2
24
23
Q3
nQ3
nQ2
Q2
Q
VCC
nQ1
3
4
22
21
VCC
Q4
LE
Pulldown
Pulldown
CLK_SEL0
CLK_SEL1
5
6
7
20
19
18
17
nQ4
Q1
VEE
nQ0
VCC
Q5
nQ5
8
9
10
11
12
Q0
XTAL_IN0
Q0
CLK_SEL1
XTAL_OUT1
XTAL_IN1
CLK0
CLK_SEL0
XTAL_IN0
XTAL_OUT0
CLK_EN
16
15
14
13
00
OSC
nQ0
XTAL_OUT0
XTAL_IN1
6 LVPECL Outputs
ICS8536-02
01
1X
OSC
Q5
XTAL_OUT1
CLK0
24-Lead TSSOP
4.4mm x 7.8mm x 0.925mm package body
G Package
nQ5
Pulldown
Top View
ICS8536AG-02 REVISION A JULY 21, 2010
1
©2010 Integrated Device Technology, Inc.