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71V416YS20PHG3 PDF预览

71V416YS20PHG3

更新时间: 2024-02-26 21:41:40
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器光电二极管
页数 文件大小 规格书
9页 137K
描述
Standard SRAM, 256KX16, 20ns, CMOS, PDSO44

71V416YS20PHG3 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete包装说明:SOJ, SOJ44,.44
Reach Compliance Code:compliant风险等级:5.84
Base Number Matches:1

71V416YS20PHG3 数据手册

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3.3V CMOS Static RAM  
for Automotive Applications  
4 Meg (256K x 16-Bit)  
IDT71V416YS  
IDT71V416YL  
Description  
Features  
TheIDT71V416isa4,194,304-bithigh-speedStaticRAMorganized  
as256Kx16.ItisfabricatedusingIDT’shigh-perfomance,high-reliability  
CMOStechnology.Thisstate-of-the-arttechnology,combinedwithinno-  
vativecircuitdesigntechniques,providesacost-effectivesolutionforhigh-  
speedmemoryneedsandautomotiveapplications.  
256K x 16 advanced high-speed CMOS Static RAM  
JEDEC Center Power / GND pinout for reduced noise.  
Equal access and cycle times  
Automotive:12/15/20ns  
One Chip Select plus one Output Enable pin  
Bidirectional data inputs and outputs directly  
TheIDT71V416has anoutputenablepinwhichoperates as fastas  
5ns,withaddressaccesstimesasfastas10ns.Allbidirectionalinputsand  
outputsoftheIDT71V416areLVTTL-compatibleandoperationisfroma  
single3.3Vsupply.Fullystaticasynchronouscircuitryisused,requiring  
noclocks orrefreshforoperation.  
The IDT71V416 is packaged in a 44-pin, 400 mil Plastic SOJ and a  
44-pin, 400 mil TSOP Type II package and a 48 ball grid array, 9mm x  
9mmpackage.  
LVTTL-compatible  
Low power consumption via chip deselect  
Upper and Lower Byte Enable Pins  
Single 3.3V power supply  
Available in 44-pin, 400 mil plastic SOJ package and a 44-  
pin, 400 mil TSOP Type II package and a 48 ball grid array,  
9mm x 9mm package.  
FunctionalBlockDiagram  
Output  
Enable  
Buffer  
OE  
Address  
Buffers  
Row / Column  
Decoders  
A0 - A17  
High  
8
8
8
8
Byte  
I/O 15  
I/O 8  
Output  
Chip  
Select  
Buffer  
Buffer  
CS  
High  
Byte  
Write  
Sense  
Amps  
and  
Write  
Drivers  
4,194,304-bit  
Memory  
Array  
Buffer  
16  
Write  
Enable  
Buffer  
Low  
Byte  
8
8
8
8
WE  
I/O 7  
I/O 0  
Output  
Buffer  
Low  
Byte  
Write  
Buffer  
BHE  
BLE  
Byte  
Enable  
Buffers  
6817 drw 01  
DECEMBER 2004  
1
©2004 IntegratedDeviceTechnology,Inc.  
DSC-6817/00  

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