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2308A-3DCGI8 PDF预览

2308A-3DCGI8

更新时间: 2023-02-26 13:06:24
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管
页数 文件大小 规格书
10页 96K
描述
Clock Driver, PDSO16

2308A-3DCGI8 数据手册

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3.3V ZERO DELAY CLOCK  
MULTIPLIER  
IDT2308A  
FEATURES:  
DESCRIPTION:  
• Phase-Lock Loop Clock Distribution for Applications ranging  
from 10MHz to 133MHz operating frequency  
• Distributes one clock input to two banks of four outputs  
• Separate output enable for each output bank  
• External feedback (FBK) pin is used to synchronize the outputs  
to the clock input  
TheIDT2308Aisahigh-speedphase-lockloop(PLL)clockmultiplier.Itis  
designedtoaddresshigh-speedclockdistributionandmultiplicationapplica-  
tions.Thezerodelayisachievedbyaligningthephasebetweentheincoming  
clockandtheoutputclock, operablewithintherangeof10to133MHz.  
TheIDT2308Ahastwobanksoffouroutputseachthatarecontrolledviatwo  
selectaddresses.Byproperselectionofinputaddresses,bothbankscanbe  
put in tri-state mode. In test mode, the PLL is turned off, and the input clock  
directlydrivestheoutputsforsystemtestingpurposes. Intheabsenceofan  
input clock, the IDT2308A enters power down. In this mode, the device will  
• Output Skew <200 ps  
• Low jitter <200 ps cycle-to-cycle  
• 1x, 2x, 4x output options (see table):  
– IDT2308A-1 1x  
– IDT2308A-2 1x, 2x  
– IDT2308A-3 2x, 4x  
drawlessthan12μAforCommercialTemperaturerangeandlessthan25μA  
forIndustrialtemperaturerange,andtheoutputsaretri-stated.  
The IDT2308A is available in six unique configurations for both pre-  
scaling and multiplication of the Input REF Clock. (See available options  
table.)  
ThePLLisclosedexternallytoprovidemoreflexibilitybyallowingtheuser  
tocontrolthedelaybetweentheinputclockandtheoutputs.  
TheIDT2308AischaracterizedforbothIndustrialandCommercialopera-  
tion.  
– IDT2308A-4 2x  
– IDT2308A-1H and -2H for High Drive  
• No external RC network required  
• Operates at 3.3V VDD  
• Available in SOIC and TSSOP packages  
FUNCTIONALBLOCKDIAGRAM  
(-3, -4)  
16  
2
FBK  
REF  
2
CLKA1  
PLL  
1
3
CLKA2  
14  
CLKA3  
15  
CLKA4  
8
9
S2  
S1  
Control  
Logic  
2
(-2, -3)  
6
CLKB1  
CLKB2  
CLKB3  
CLKB4  
7
10  
11  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES  
MAY 2010  
1
c
2010 Integrated Device Technology, Inc.  
DSC 6587/9  

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