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2308A-1HPGGI8 PDF预览

2308A-1HPGGI8

更新时间: 2024-01-02 09:13:03
品牌 Logo 应用领域
艾迪悌 - IDT PC光电二极管
页数 文件大小 规格书
10页 96K
描述
TSSOP-16, Reel

2308A-1HPGGI8 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:TSSOP
针数:16Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.6Samacsys Confidence:4
Samacsys Status:Released2D Presentation:https://componentsearchengine.com/2D/0T/11319501.2.1.png
Schematic Symbol:https://componentsearchengine.com/symbol.php?partID=11319501PCB Footprint:https://componentsearchengine.com/footprint.php?partID=11319501
3D View:https://componentsearchengine.com/viewer/3D.php?partID=11319501Samacsys PartID:11319501
Samacsys Image:https://componentsearchengine.com/Images/9/2308A-1HPGGI8.jpgSamacsys Thumbnail Image:https://componentsearchengine.com/Thumbnails/2/2308A-1HPGGI8.jpg
Samacsys Pin Count:16Samacsys Part Category:Integrated Circuit
Samacsys Package Category:Small Outline PackagesSamacsys Footprint Name:PGG16_2
Samacsys Released Date:2020-02-08 18:34:36Is Samacsys:N
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
最大I(ol):0.012 A湿度敏感等级:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified子类别:Clock Drivers
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
Base Number Matches:1

2308A-1HPGGI8 数据手册

 浏览型号2308A-1HPGGI8的Datasheet PDF文件第2页浏览型号2308A-1HPGGI8的Datasheet PDF文件第3页浏览型号2308A-1HPGGI8的Datasheet PDF文件第4页浏览型号2308A-1HPGGI8的Datasheet PDF文件第5页浏览型号2308A-1HPGGI8的Datasheet PDF文件第6页浏览型号2308A-1HPGGI8的Datasheet PDF文件第7页 
3.3V ZERO DELAY CLOCK  
MULTIPLIER  
IDT2308A  
FEATURES:  
DESCRIPTION:  
• Phase-Lock Loop Clock Distribution for Applications ranging  
from 10MHz to 133MHz operating frequency  
• Distributes one clock input to two banks of four outputs  
• Separate output enable for each output bank  
• External feedback (FBK) pin is used to synchronize the outputs  
to the clock input  
TheIDT2308Aisahigh-speedphase-lockloop(PLL)clockmultiplier.Itis  
designedtoaddresshigh-speedclockdistributionandmultiplicationapplica-  
tions.Thezerodelayisachievedbyaligningthephasebetweentheincoming  
clockandtheoutputclock, operablewithintherangeof10to133MHz.  
TheIDT2308Ahastwobanksoffouroutputseachthatarecontrolledviatwo  
selectaddresses.Byproperselectionofinputaddresses,bothbankscanbe  
put in tri-state mode. In test mode, the PLL is turned off, and the input clock  
directlydrivestheoutputsforsystemtestingpurposes. Intheabsenceofan  
input clock, the IDT2308A enters power down. In this mode, the device will  
• Output Skew <200 ps  
• Low jitter <200 ps cycle-to-cycle  
• 1x, 2x, 4x output options (see table):  
– IDT2308A-1 1x  
– IDT2308A-2 1x, 2x  
– IDT2308A-3 2x, 4x  
drawlessthan12μAforCommercialTemperaturerangeandlessthan25μA  
forIndustrialtemperaturerange,andtheoutputsaretri-stated.  
The IDT2308A is available in six unique configurations for both pre-  
scaling and multiplication of the Input REF Clock. (See available options  
table.)  
ThePLLisclosedexternallytoprovidemoreflexibilitybyallowingtheuser  
tocontrolthedelaybetweentheinputclockandtheoutputs.  
TheIDT2308AischaracterizedforbothIndustrialandCommercialopera-  
tion.  
– IDT2308A-4 2x  
– IDT2308A-1H and -2H for High Drive  
• No external RC network required  
• Operates at 3.3V VDD  
• Available in SOIC and TSSOP packages  
FUNCTIONALBLOCKDIAGRAM  
(-3, -4)  
16  
2
FBK  
REF  
2
CLKA1  
PLL  
1
3
CLKA2  
14  
CLKA3  
15  
CLKA4  
8
9
S2  
S1  
Control  
Logic  
2
(-2, -3)  
6
CLKB1  
CLKB2  
CLKB3  
CLKB4  
7
10  
11  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES  
MAY 2010  
1
c
2010 Integrated Device Technology, Inc.  
DSC 6587/9  

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