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1726M-11LFT PDF预览

1726M-11LFT

更新时间: 2024-01-14 07:12:32
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
8页 92K
描述
Clock Generator, 32MHz, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8

1726M-11LFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.79
JESD-30 代码:R-PDSO-G8JESD-609代码:e3
长度:4.9 mm湿度敏感等级:1
端子数量:8最高工作温度:70 °C
最低工作温度:最大输出时钟频率:32 MHz
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260主时钟/晶体标称频率:32 MHz
认证状态:Not Qualified座面最大高度:1.75 mm
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.9 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

1726M-11LFT 数据手册

 浏览型号1726M-11LFT的Datasheet PDF文件第2页浏览型号1726M-11LFT的Datasheet PDF文件第3页浏览型号1726M-11LFT的Datasheet PDF文件第4页浏览型号1726M-11LFT的Datasheet PDF文件第5页浏览型号1726M-11LFT的Datasheet PDF文件第6页浏览型号1726M-11LFT的Datasheet PDF文件第7页 
DATASHEET  
LOW EMI CLOCK GENERATOR  
ICS1726-11  
Description  
Features  
The ICS1726-11 generates a low EMI output clock  
from a clock or crystal input. The part is designed to  
dither the LCD interface clock for PDAs, printers,  
scanners, modems, copiers, and others. Using IDT’s  
proprietary mix of analog and digital Phase-Locked  
Loop (PLL) technology, the device spreads the  
frequency spectrum of the output, reducing the  
frequency amplitude peaks by several dB. The  
ICS1726-11 offers both centered and down spread  
from a high-speed clock input.  
Packaged in 8-pin SOIC/TSSOP  
Provides a spread spectrum output clock  
Supports flat panel controllers  
Accepts a clock or crystal input (provides same  
frequency dithered output)  
Input frequency range of 16 to 32 MHz  
Output frequency range of 16 to 32 MHz  
Center and down spread  
Peak reduction by 8 dB to 16 dB typical on 3rd  
IDT offers many other clocks for computers and  
computer peripherals. Consult us when you need to  
remove crystals and oscillators from your board.  
through 19th odd harmonics  
Low EMI feature can be disabled  
Includes power down  
Operating voltage of 3.3 V  
Advanced, low-power CMOS process  
Block Diagram  
VDD  
2
S1:0  
PLL Clock  
Synthesis  
and Spread  
Spectrum  
Circuitry  
SSCLK  
X1/ICLK  
Clock Buffer/  
Crystal  
Oscillator  
X2  
GND  
External caps required for with crystal  
for accurate tuning of the clock  
IDT® LOW EMI CLOCK GENERATOR  
1
ICS1726-11  
REV B 081010  

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