Datasheet > ICSSSTUB32871AZT

ICSSSTUB32871AZT

更新时间： 2024-11-13 04:07:55

品牌	Logo	应用领域
矽成 - ICSI		双倍数据速率
页数	文件大小	规格书
18页	200K
描述
27-Bit Registered Buffer for DDR2

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中文翻译

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数据手册

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ICSSSTUB32871AZT 数据手册

ICSSSTUB32871A

Integrated

Circuit

Systems,Inc.

27-Bit Registered Buffer for DDR2

Pin Configuration

Recommended Application:

•

DDR2 Memory Modules

•

Provides complete DDR DIMM solution with

ICS98ULPA877A, ICS97ULP877, or IDTCSPUA877A

•

Optimized for DDR2 400/533/667 JEDEC 4 Rank

VLP DIMMS

Product Features:

•

27-bit 1:1 registered buffer with parity check

functionality

Supports SSTL_18 JEDEC specification on data

inputs and outputs

Supports LVCMOS switching levels on RESET input

50% more dynamic driver strength than standard

SSTU32864

Low voltage operation

V_DD= 1.7V to 1.9V

Available in 96 BGA package

•

96 Ball BGA

(Top View)

FunctionalityTruthTable

Inputs

Outputs

QCS

Dn,

DODTn,

DCKEn

CSGate

Enable

QODT,

QCKE

RESET

DCS0

DCS1

↓

↑

↓

L or H

↓

↑

L or H

↑

Q₀

↓

↑

L or H

↑

Q₀

L or H

↓

L or H

↓

↑

Q₀

L or H

↑

↓

Q₀

L or H

↓

↑

L or H

Q₀

X or

floating

X or

floating

X or

floating

X or

floating

X or

floating

X or

floating

1186G—04/16/07

12 3 4 5 6 7...18

中文翻译

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与ICSSSTUB32871AZT相关器件

型号	品牌	获取价格	描述	数据表
ICSSSTUB32872A	ICSI	获取价格	28-Bit Registered Buffer for DDR2
ICSSSTUB32872AHLF	IDT	获取价格	Bus Driver, PBGA96
ICSSSTUB32872AHLFT	IDT	获取价格	D Flip-Flop, 32872 Series, 1-Func, Positive Edge Triggered, 28-Bit, True Output, PBGA96, 5
ICSSSTUB32872AHM	IDT	获取价格	Bus Driver, PBGA96
ICSSSTUB32872AHMLF	IDT	获取价格	Bus Driver, PBGA96
ICSSSTUB32872AHMLFT	IDT	获取价格	D Flip-Flop, 32872 Series, 1-Func, Positive Edge Triggered, 28-Bit, True Output, PBGA96, 5
ICSSSTUB32872AHT	IDT	获取价格	D Flip-Flop, 32872 Series, 1-Func, Positive Edge Triggered, 28-Bit, True Output, PBGA96, 5
ICSSSTUB32S869BHLF	IDT	获取价格	Interface Circuit
ICSSSTUB32S869BHLFT	IDT	获取价格	Interface Circuit
ICSSSTUBF32866A	ICSI	获取价格	25-Bit Configurable Registered Buffer for DDR2