5秒后页面跳转
ICS9250-29 PDF预览

ICS9250-29

更新时间: 2024-11-12 22:55:27
品牌 Logo 应用领域
矽成 - ICSI /
页数 文件大小 规格书
15页 220K
描述
Frequency Generator & Integrated Buffers for Celeron & PII/III⑩

ICS9250-29 数据手册

 浏览型号ICS9250-29的Datasheet PDF文件第2页浏览型号ICS9250-29的Datasheet PDF文件第3页浏览型号ICS9250-29的Datasheet PDF文件第4页浏览型号ICS9250-29的Datasheet PDF文件第5页浏览型号ICS9250-29的Datasheet PDF文件第6页浏览型号ICS9250-29的Datasheet PDF文件第7页 
Integrated  
Circuit  
Systems, Inc.  
ICS9250-29  
Frequency Generator & Integrated Buffers for Celeron & PII/III™  
Recommended Application:  
Solano type chipset.  
Pin Configuration  
IOAPIC  
VDDL  
GNDL  
*FS1/REF  
VDDR  
X1  
1
2
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
GNDL  
VDDL  
3
4
5
6
7
8
9
CPUCLK0  
CPUCLK1  
GND1  
SDRAM0  
SDRAM1  
VDD1  
Output Features:  
2 CPU (2.5V) (up to 133MHz achievable through I2C)  
13 SDRAM (3.3V) (up to 133MHz achievable  
X2  
GNDR  
VDD3  
through I2C)  
GND1  
5 PCI (3.3 V) @33.3MHz  
3V66-0  
3V66-1  
3V66-2  
GND3  
PCICLK0  
PCICLK1  
PCICLK2  
VDD2  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
SDRAM2  
SDRAM3  
SDRAM4  
SDRAM5  
VDD1  
1 IOAPIC (2.5V) @ 33.3 MHz  
3 Hublink clocks (3.3 V) @ 66.6 MHz  
2 (3.3V) @ 48 MHz (Non spread spectrum)  
1 REF (3.3V) @ 14.318 MHz  
GND1  
SDRAM6  
SDRAM7  
SDRAM8  
SDRAM9  
VDD1  
GND2  
PCICLK3  
PCICLK4  
FS0  
GNDA  
VDDA  
Features:  
Supports spread spectrum modulation,  
0 to -0.5% down spread.  
GND1  
SDRAM10  
SDRAM11  
VDD1  
I2C support for power management  
Efficient power management scheme through PD#  
Uses external 14.138 MHz crystal  
Alternate frequency selections available through I2C  
control.  
SCLK  
SDATA  
GNDF  
VDDF  
GND1  
SDRAM12  
TRISTATE#/PD#**  
48MHz_1  
48MHz_0  
56-Pin 300mil SSOP  
* This input has a 50K pull-down to GND.  
** This input has a 50K pull-up to VDD  
Functionality  
Block Diagram  
CPU  
MHz  
SDRAM  
MHz  
Tristate# FS0  
FS1  
X1  
X2  
XTAL  
OSC  
0
0
1
1
1
1
0
1
0
1
0
1
X
X
0
Tristate Tristate  
Test Test  
REF  
PLL1  
Spread  
Spectrum  
66MHz 100MHz  
100MHz 100MHz  
133MHz 133MHz  
133MHz 100MHz  
0
/2  
/3  
VDDL  
1
CPU66/100/133 [1:0]  
2
1
3V66 [2:0]  
FS(1:0)  
PD#  
3
Control  
Logic  
SDRAM [12:0]  
PCICLK [4:0]  
13  
Power Groups  
TRISTATE#  
Config  
Reg  
/2  
5
VDDA, GNDA = CPU, PLL (analog)  
VDDF, GNDF = Fixed PLL, 48M (analog/digital)  
VDDR, GNDR = REF, X1, X2 (analog/digital)  
VDD3, GND3 = 3V66 (digital)  
SDATA  
SCLK  
IOAPIC  
VDDL  
/2  
48MHz [1:0]  
PLL2  
VDD2, GND2 = PCI (digital)  
2
VDD1, GND1 = SDRAM (digital)  
VDDL, GNDL = IOAPIC, CPU (digital)  
ICS reserves the right to make changes in the device data identified in this  
publication without further notice. ICS advises its customers to obtain the  
latest version of all device data to verify that any information being relied  
upon by the customer is current and accurate.  
9250-29 Rev A 02/01/01  
Third party brands and names are the property of their respective owners.  

与ICS9250-29相关器件

型号 品牌 获取价格 描述 数据表
ICS9250-30 ICSI

获取价格

Frequency Generator & Integrated Buffers for
ICS9250-32 ICSI

获取价格

Frequency Generator & Integrated Buffers for
ICS9250-37 ICSI

获取价格

Preliminary Product Preview
ICS9250-38 ICSI

获取价格

Frequency Generator with 200MHz Differential CPU Clocks
ICS9250-50 ICSI

获取价格

Frequency Generator & Integrated Buffers for PIII & Tualatin
ICS9250AF-29 IDT

获取价格

Processor Specific Clock Generator, 133MHz, PDSO56, 0.300 INCH, MO-118, SSOP-56
ICS9250BF-12LF IDT

获取价格

Clock Generator
ICS9250BF-12LFT IDT

获取价格

Clock Generator
ICS9250BF-16 IDT

获取价格

Processor Specific Clock Generator, 150MHz, PDSO56, 0.300 INCH, SSOP-56
ICS9250BF-16LF-T IDT

获取价格

Processor Specific Clock Generator, 150MHz, PDSO56, 0.300 INCH, GREEN, SSOP-56