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ICS9250-22 PDF预览

ICS9250-22

更新时间： 2024-09-24 22:55:27
品牌 Logo 应用领域
矽成 - ICSI /
页数 文件大小 规格书
11页 109K
描述
Frequency Generator for P IV⑩

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ICS9250-22 数据手册

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Integrated  
Circuit  
Systems, Inc.  
ICS9250-22  
Frequency Generator for P IV™  
Recommended Application:  
P IV Chipset Support  
Output Features:  
Pin Configuration  
GND  
MULTSEL0/REF  
MULTSEL1/REF  
VDDREF  
X1  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
VDDMREF  
3VMREF  
•
•
4 Differential CPU Clock Pairs @ 3.3V  
2 - 3V MREF clocks for memory reference seeds,  
(separate single ended but 180 degrees out of phase)  
3VMREF_B  
GNDMREF  
SPREAD#  
CPUCLKST3  
CPUCLKSC3  
VDDCPU  
CPUCLKST2  
CPUCLKSC2  
GNDCPU  
CPUCLKST1  
CPUCLKSC1  
VDDCPU  
CPUCLKST0  
CPUCLKSC0  
GNDCPU  
I REF  
VDDA  
GNDA  
VDD3V66  
3V66-3  
3V66-2  
GND3V66  
GND3V66  
3V66-1  
3V66-0  
VDD3V66  
X2  
•
•
•
4 - 66MHz reference output  
10 - 3V 33MHz PCI clocks  
2 - 48MHz clocks  
GNDREF  
PCICLK0  
PCICLK1  
VDDPCI  
PCICLK2  
PCICLK3  
GNDPCI  
PCICLK4  
PCICLK5  
VDDPCI  
PCICLK6  
PCICLK7  
GNDPCI  
PCICLK8  
PCICLK9  
VDDPCI  
•
2 - 14.318 reference output  
Features:  
•
•
Support power management: Power Down Mode  
Supports Spread Spectrum modulation: 0 to -0.5% down  
spread.  
•
•
Uses external 14.318MHz crystal  
Select logic for Differential Swing Control, Test mode,  
Tristate, Power down, Spread Spectrum, limited  
frequency select, selective clock enable.  
SEL100/133  
GND48  
FS0/48MHz  
FS1/48MHz  
VDD48  
•
•
External resistor for current reference  
FS pins for frequency select  
Key Specifications:  
PD#  
•
•
•
3V66 Output jitter <300ps  
CPU Output Jitter <200ps  
MREF Output jitter <250ps  
56-Pin 300mil SSOP &TSSOP  
Block Diagram  
Functionality  
SEL133/  
100  
FS0 FS1  
Function  
0
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Active 100MHz  
(Reserved)  
PLL2  
48MHz  
2
0
0
(Reserved)  
0
Tristate all outputs  
Active 133MHz  
(Reserved)  
X1  
X2  
XTAL  
OSC  
REF  
2
1
1
PLL1  
Spread  
Spectrum  
CPUCLKST (3:0)  
CPUCLKSC (3:0)  
CPU  
DIVDER  
4
1
(Reserved)  
4
1
Test Mode  
3VMREF  
DIVDER  
3VMREF  
3VMREF_B  
Control  
Logic  
PD#  
SPREAD#  
PCI  
DIVDER  
PCICLK (9:0)  
3V66 (3:0)  
10  
4
Power Groups  
MULTSEL (1:0)  
SEL100/133  
FS(1:0)  
Config.  
Reg.  
VDDREF, GNDREF=REF, X1, X2  
3V66  
DIVDER  
VDDPCI, GNDPCI=PCICLK  
VDD48, GND48=48MHz, PLL2  
VDD3V66,GND3V66=3V66  
VDDCPU, GNDCPU=CPUCLK  
VDDMREF, GNDMREF=3VMREF, 3VMREF_B  
VDDA=VDD (core supply voltage 3.3V)  
GNDA=Ground for core supply  
ICS reserves the right to make changes in the device data identified in  
this publication without further notice. ICS advises its customers to  
obtain the latest version of all device data to verify that any  
9250-22 Rev B 12/08/00  
Third party brands and names are the property of their respective owners.  
information being relied upon by the customer is current and accurate.  
1234567...11

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