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ICS9248YF-103LF PDF预览

ICS9248YF-103LF

更新时间: 2024-09-25 19:57:03
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
16页 392K
描述
Processor Specific Clock Generator, 137MHz, PDSO48, SSOP-48

ICS9248YF-103LF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP,针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.73
其他特性:IT CAN ALSO OPERATES AT 3.3VJESD-30 代码:R-PDSO-G48
JESD-609代码:e3长度:15.875 mm
端子数量:48最高工作温度:70 °C
最低工作温度:最大输出时钟频率:137 MHz
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):260主时钟/晶体标称频率:14.318 MHz
认证状态:Not Qualified座面最大高度:2.794 mm
最大供电电压:2.625 V最小供电电压:2.375 V
标称供电电压:2.5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:7.5 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFICBase Number Matches:1

ICS9248YF-103LF 数据手册

 浏览型号ICS9248YF-103LF的Datasheet PDF文件第2页浏览型号ICS9248YF-103LF的Datasheet PDF文件第3页浏览型号ICS9248YF-103LF的Datasheet PDF文件第4页浏览型号ICS9248YF-103LF的Datasheet PDF文件第5页浏览型号ICS9248YF-103LF的Datasheet PDF文件第6页浏览型号ICS9248YF-103LF的Datasheet PDF文件第7页 
Integrated  
Circuit  
Systems, Inc.  
ICS9248-103  
Frequency Generator & Integrated Buffers for PENTIUM/ProTM  
General Description  
Features  
•
•
•
Up to 137MHz frequency support  
The ICS9248-103 is the single chip clock solution for  
Notebook designs using the 440BX or the VIAApollo Pro 133  
style chipset. It provides all necessary clock signals for such a  
system.  
Spread Spectrum for EMI control  
Serial I2C interface for Power Management,  
Frequency Select, Spread Spectrum  
Provides the following system clocks  
- 4-CPUs@2.5/3.3V, upto137MHz  
(includingCPUCLK_F)  
•
Spread spectrum may be enabled through I2C programming.  
Spread spectrum typically reduces system EMI by 8dB to  
10dB. This simplifies EMI qualification without resorting to  
board design iterations or costly shielding. The ICS9248-103  
employs a proprietary closed loop design, which tightly  
controls the percentage of spreading over process and  
temperature variations.  
- 9-SDRAMs @3.3V, upto137MHz  
(including SDRAM_F)  
- 8-PCI@3.3V, CPU/2orCPU/3  
(including 3 free running PCICLK_Fs)  
- 1-24/48MHz@3.3V  
-1-48MHz@3.3Vfixed  
- 2-REF@3.3V,14.318MHz.  
•
•
Efficient Power management scheme through PCI  
andSTOPCLOCKS  
Spread Spectrum ± .25%, & 0 to -0.5% down spread  
Block Diagram  
Pin Configuration  
48-Pin SSOP  
* Internal Pull-up Resistor of 120K to VDD  
Power Groups  
VDDLCPU,GNDLCPU=CPUCLK[2:0],CPUCLK_F  
VDDSDR,GNDSDR=SDRAMCLKS[7:0],SDRAM_F  
VDDPCI,GNDPCI=PCICLKS[6:0],PCICLK_F  
VDD48,GND48=48MHz,24MHz  
VDDREF,GNDREF=REF,X1,X2  
VDDCOR=PLLCORE  
Pentium is a trademark of Intel Corporation  
I2C is a trademark of Philips Corporation  
ICS reserves the right to make changes in the device data identified in  
this publication without further notice. ICS advises its customers to  
obtain the latest version of all device data to verify that any  
9248-103RevC 10/14/99  
information being relied upon by the customer is current and accurate.  

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