Datasheet > ICS9248F-20LF

ICS9248F-20LF

更新时间： 2024-09-25 14:51:23

品牌	Logo	应用领域
艾迪悌 - IDT		时钟光电二极管外围集成电路晶体
页数	文件大小	规格书
11页	427K
描述
Processor Specific Clock Generator, 100MHz, PDSO48, 0.300 INCH, SSOP-48

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ICS9248F-20LF 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	SSOP
包装说明：	SSOP,	针数：	48
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.73
其他特性：	CAN ALSO OPERTATE AT 3.3V SUPPLY	JESD-30 代码：	R-PDSO-G48
JESD-609代码：	e3	长度：	15.875 mm
端子数量：	48	最高工作温度：	70 °C
最低工作温度：		最大输出时钟频率：	100 MHz
封装主体材料：	PLASTIC/EPOXY	封装代码：	SSOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）：	260	主时钟/晶体标称频率：	14.318 MHz
认证状态：	Not Qualified	座面最大高度：	2.794 mm
最大供电电压：	3.465 V	最小供电电压：	3.135 V
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	Matte Tin (Sn)	端子形式：	GULL WING
端子节距：	0.635 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	30	宽度：	7.5 mm
uPs/uCs/外围集成电路类型：	CLOCK GENERATOR, PROCESSOR SPECIFIC	Base Number Matches：	1

ICS9248F-20LF 数据手册

Integrated

Circuit

Systems, Inc.

ICS9248-20

Pentium/Pro System Clock Chip

General Description

Features

Generates system clocks for CPU, IOAPIC, PCI, plus

The ICS9248-20 is a Clock Synthesizer chip for Pentium and

PentiumPro CPU based Desktop/Notebook systems that will

provide all necessary clock timing.

14.314 MHz REF (0:2), USB, and Super I/O

Supports single or dual processor systems

Supports Spread Spectrum modulation for CPU & PCI

clocks, down spread -0.5%

Skew from CPU (earlier) to PCI clock (rising edges for

100/33.3MHz) 1.5 to 4ns

Two fixed outputs at 48MHz.

Separate 2.5V and 3.3V supply pins

2.5V or 3.3V output: CPU, IOAPIC

3.3V outputs: PCI, REF, 48MHz

No power supply sequence requirements

Uses external 14.318MHz crystal, no external load cap

required for C_L=18pF crystal

Features include four CPU and eight PCI clocks. Three

reference outputs are available equal to the crystal frequency.

Additionally, the device meets the Pentium power-up

stabilization requirement, assuring that CPU and PCI clocks

are stable within 2ms after power-up.

PD# pin enables low power mode by stopping crystal OSC

and PLL stages. Other power management features include

CPU_STOP#, whichstopsCPU(0:3)clocks, andPCI_STOP#,

which stops PCICLK (0:6) clocks.

High drive CPUCLK outputs typically provide greater than 1

V/ns slew rate into 20pF loads. PCICLK outputs typically

provide better than 1V/ns slew rate into 30pF loads while

maintaining 50±5%dutycycle.TheREFclockoutputstypically

provide better than 0.5V/ns slew rates.

48 pin 300 mil SSOP

The ICS9248-20 accepts a 14.318MHz reference crystal or

clock as its input and runs on a 3.3V core supply.

Pin Configuration

Block Diagram

48-Pin SSOP

Power Groups

Ground Groups

VDD = Supply for PLL core

VDD1 = REF (0:2), X1, X2

VDD2 = PCICLK_F, PCICLK (0:6)

VDD3 = 48MHz0, 48MHz1

VDDL1 = IOAPIC (0:1)

GND = Ground for PLL core

GND1 = REF (0:2), X1, X2

GND2 = PCICLK_F, PCICLK (0:6)

GND3 = 48MHz0, 48MHz1

GNDL1 = IOAPIC (0:1)

VDDL2 = CPUCLK (0:3)

GNDL2 = CPUCLK (0:3)

Pentium is a trademark on Intel Corporation.

9248-20 Rev C 08/02/04

ICS reserves the right to make changes in the device data identified in this

publication without further notice. ICS advises its customers to obtain the

latest version of all device data to verify that any information being relied

upon by the customer is current and accurate.

12 3 4 5 6 7...11

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与ICS9248F-20LF相关器件

型号	品牌	获取价格	描述	数据表
ICS9248F-20T	IDT	获取价格	Clock Driver
ICS9248F-56	IDT	获取价格	Processor Specific Clock Generator, 100MHz, PDSO28, 0.209 INCH, SSOP-28
ICS9248F-56LF	IDT	获取价格	Processor Specific Clock Generator, 100MHz, PDSO28, 0.209 INCH, SSOP-28
ICS9248F-61	ICSI	获取价格	Frequency Timing Generator for Pentium II Systems
ICS9248F-66	IDT	获取价格	Clock Generator, PDSO48, SSOP-48
ICS9248F-77	IDT	获取价格	Clock Generator, CMOS, PDSO48, SSOP-48
ICS9248F-80-T	IDT	获取价格	Clock Generator, PDSO28
ICS9248G50	ETC	获取价格	Industrial Control IC
ICS9248G-50-T	IDT	获取价格	Clock Generator, PDSO28, TSOP-28
ICS9248G-92	IDT	获取价格	Clock Generator, PDSO48, TSOP-48

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