Integrated
Circuit
Systems, Inc.
ICS9248-126
Frequency Generator & Integrated Buffers for Celeron & PII/III™ & K6
Recommended Application:
Pin Configuration
Motherboard Single chip clock solution for Pentium II/III and
K6 processors, using SIS540/SIS630 style chipset"
Output Features:
VDDREF
*1REF0/FS3
GND
1
2
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
REF1
VDDLCPU
CPUCLK0
CPUCLK1
GND
CPUCLK2
VDDSDR
SDRAM13
SDRAM12
GND
SDRAM11
SDRAM10
VDDSDR
SDRAM9
SDRAM8
GNDSDR
SDRAM7
SDRAM6
VDDSDR
SDRAM5
SDRAM4
VDDSDR
48MHz/FS0*1
24_48MHz/CPU2.5_3.3#*
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
X1
X2
•
•
•
•
•
3- CPUs @ 2.5/3.3V, up to 166MHz.
14 - SDRAM @ 3.3V
VDDPCI
*PCICLK0/FS1
*PCICLK1/FS2
PCICLK2
GND
7- PCI @3.3V,
PCICLK3
PCICLK4
PCICLK5
PCICLK6
VDDSDR
GND
SDRAM0
SDRAM1
VDDSDR
SDRAM2
SDRAM3
GND
1- 48MHz, @3.3V fixed.
1- 24/48MHz, @3.3V selectable by I2C
(Default is 24MHz).
•
2- REF @3.3V, 14.318MHz.
Features:
•
•
•
Up to 166MHz frequency support
Support FS0-FS3 trapping status bit for I2C read back.
SDATA
SCLK
Support power management: CPU, PCI, SDRAM stop
and Power down Mode form I2C programming.
•
•
Spread spectrum for EMI control (0 to -0.5%, ± 0.25%).
48-Pin 300mil SSOP
* These inputs have a 120K pull down to GND"
1 These are double strength"
FS0, FS1, FS3 must have a internal 120K pull-Down
to GND.
•
Uses external 14.318MHz crystal
Skew Specifications:
•
•
•
•
•
CPU - CPU: < 175ps
SDRAM - SDRAM < 500ps
PCI - PCI: < 500ps
CPU - SDRAM: < 500ps
CPU - PCI: 1 - 4ns
Functionality
Block Diagram
CPU
(MHz)
66.6
100.0
150.0
133.3
66.8
100.0
100.0
133.3
66.8
97.0
70.0
95.0
95.0
112.0
97.0
96.2
SDRAM PCICLK
FS3 FS2 FS1 FS0
PLL2
48MHz
(MHz)
100.0
100.0
100.0
100.0
133.6
133.3
150.0
133.3
66.8
(MHz)
33.3
33.3
37.5
33.3
33.4
33.3
37.5
33.3
33.4
32.3
35.0
31.7
31.7
37.3
32.2
32.1
24_48MHz
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
/ 2
X1
X2
XTAL
OSC
REF (1:0)
2
PLL1
Spread
Spectrum
CPU
CLOCK
DIVDER
CPUCLK (2:0)
SDRAM (13:0)
3
SDRAM
CLOCK
DIVDER
4
LATCH
14
FS(3:0)
97.0
105.0
95.0
PCI
CLOCK
DIVDER
PCICLK (6:0)
Control
Logic
7
126.7
112.0
129.3
96.2
CPU2.5_3.3#
Config.
Reg.
SDATA
SCLK
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
9248-126 Rev C 9/6/00
Third party brands and names are the property of their respective owners.
information being relied upon by the customer is current and accurate.