Datasheet > ICS91857AG

ICS91857AG

更新时间： 2025-08-09 19:18:51

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
15页	305K
描述
输入信号类型:LVCMOS;输出信号类型:SSTL-2;元器件封装:48-TSSOP;

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中文翻译

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数据手册

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ICS91857AG 数据手册

ICS91857

Value SSTL_2 Clock Driver (60MHz - 220MHz)

RecommendedApplication:

Zero delay board fan-out memory modules

Pin Configuration

GND

CLKC0

CLKT0

VDD

CLKT1

CLKC1

GND

CLKC5

CLKT5

VDD

CLKT6

CLKC6

GND

ProductDescription/Features:

•

Meets PC3200 specification for DDRI-400 support

Low skew, low jitter PLL clock driver

1 to 10 differential clock distribution (SSTL_2)

Feedback pins for input to output synchronization

GND

CLKC2

CLKT2

VDD

CLKC7

CLKT7

VDD

•

PD#forpowermanagement

Spread Spectrum tolerant inputs

VDD

PD#

CLK_INT

CLK_INC

VDD

AVDD

AGND

GND

CLKC3

CLKT3

VDD

CLKT4

CLKC4

GND

FB_INT

FB_INC

VDD

FB_OUTC

FB_OUTT

GND

CLKC8

CLKT8

VDD

CLKT9

CLKC9

GND

•

Auto PD when input signal removed

SwitchingCharacteristics:

•

CYCLE - CYCLE jitter (>100MHz):<75ps

OUTPUT - OUTPUT skew: <100ps

48-Pin TSSOP

6.10 mm. Body, 0.50 mm. pitch TSSOP

Functionality

Block Diagram

INPUTS

OUTPUTS

PLL State

AVDD PD# CLK_INT CLK_INC CLKT CLKC FB_OUTT FB_OUTC

FB_OUTT

GND

Bypassed/off

FB_OUTC

CLKT0

CLKC0

2.5V

(nom)

off

CLKT1

CLKC1

2.5V

(nom)

Control

CLKT2

CLKC2

2.5V

(nom)

PD#

Logic

2.5V

(nom)

CLKT3

CLKC3

2.5V

(nom)

<20MHz)⁽¹⁾

CLKT4

CLKC4

FB_INT

FB_INC

CLKT5

CLKC5

PLL

CLK_INC

CLK_INT

CLKT6

CLKC6

CLKT7

CLKC7

CLKT8

CLKC8

CLKT9

CLKC9

0494C—08/15/05

12 3 4 5 6 7...15

中文翻译

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与ICS91857AG相关器件

型号	品牌	获取价格	描述	数据表
ICS91857AG-LF	IDT	获取价格	PLL Based Clock Driver, 91857 Series, 10 True Output(s), 0 Inverted Output(s), PDSO48, 6.1
ICS91857AG-LF-T	IDT	获取价格	PLL Based Clock Driver, 91857 Series, 10 True Output(s), 0 Inverted Output(s), PDSO48, 6.1
ICS91857AG-T	IDT	获取价格	91857 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48, 6.1
ICS91857AGT	IDT	获取价格	PLL Based Clock Driver, 91857 Series, 10 True Output(s), 0 Inverted Output(s), PDSO48, 6.1
ICS91857AGT	RENESAS	获取价格	输入信号类型:LVCMOS;输出信号类型:SSTL-2;元器件封装:48-TSSOP;
ICS91857AL-T	IDT	获取价格	91857 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48, 4.4
ICS91857ALLF	IDT	获取价格	Clock Driver, PDSO48
ICS91857ALLFT	IDT	获取价格	Clock Driver, PDSO48
ICS91857GLFT	IDT	获取价格	Clock Driver
ICS91857LT	IDT	获取价格	Clock Driver