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ICS86953BYILF-147 PDF预览

ICS86953BYILF-147

更新时间: 2024-01-08 11:20:35
品牌 Logo 应用领域
艾迪悌 - IDT 驱动逻辑集成电路
页数 文件大小 规格书
13页 262K
描述
PLL Based Clock Driver, 8 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32

ICS86953BYILF-147 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFP
包装说明:7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32针数:32
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.35输入调节:DIFFERENTIAL
JESD-30 代码:S-PQFP-G32JESD-609代码:e3
长度:7 mm逻辑集成电路类型:PLL BASED CLOCK DRIVER
湿度敏感等级:3功能数量:1
反相输出次数:端子数量:32
实输出次数:8最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
峰值回流温度(摄氏度):260传播延迟(tpd):4 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.075 ns
座面最大高度:1.6 mm最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:7 mm
最小 fmax:62.5 MHzBase Number Matches:1

ICS86953BYILF-147 数据手册

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ICS86953I-147  
Integrated  
Circuit  
Systems, Inc.  
LOW  
SKEW, 1-TO-9  
D
IFFERENTIAL  
-
TO-LVCMOS / LVTTL ZERO  
DELAY  
BUFFER  
GENERAL DESCRIPTION  
FEATURES  
The ICS86953I-147 is a low voltage, low skew • 9 single ended LVCMOS/LVTTL outputs;  
ICS  
1-to-9 Differential-to-LVCMOS/LVTTL Clock  
Generator and a member of the HiPerClockS™  
family of High Performance Clock Solutions from  
ICS.The PCLK, nPCLK pair can accept most stan-  
(8) clocks, (1) feedback  
HiPerClockS™  
• PCLK, nPCLK pair can accept the following differential  
input levels: LVPECL, CML, SSTL  
dard differential input levels.With output frequencies up to 175MHz,  
the ICS86953I-147 is targeted for high performance clock ap-  
plications. Along with a fully integrated PLL, the ICS86953I-147  
contains frequency configurable outputs and an external feed-  
back input for regenerating clocks with “zero delay”.  
• Maximum output frequency: PLL Mode, 175MHz  
• VCO range: 250MHz to 700MHz  
• Output skew: 75ps (maximum)  
• Cycle-to-cycle jitter: 50ps (maximum)  
• Static phase offset: 90ps 110ps  
• 3.3V supply voltage  
• -40°C to 85°C ambient operating temperature  
• Pin compatible to the MPC953  
PIN ASSIGNMENT  
32 31 30 29 28 27 26 25  
VDDA  
FB_CLK  
nc  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
Q1  
VDDO  
Q2  
nc  
GND  
Q3  
ICS86953I-147  
nc  
nc  
VDDO  
Q4  
GND  
PCLK  
GND  
9
10 11 12 13 14 15 16  
32-Lead LQFP  
7mm x 7mm x 1.4mm package body  
Y package  
Top View  
BLOCK DIAGRAM  
QFB  
PCLK  
nPCLK  
0
1
0
1
7
Q0:Q6  
Q7  
/
0
1
Phase  
Detector  
÷4  
LPF  
VCO  
FB_CLK  
÷2  
VCO_SEL  
nBYPASS  
MR/nOE  
PLL_SEL  
86953BYI-147  
www.icst.com/products/hiperclocks.html  
REV. B APRIL 23, 2004  
1

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