Datasheet > ICS85401AK

ICS85401AK

更新时间： 2024-11-11 04:58:15

品牌	Logo	应用领域
矽成 - ICSI		复用器逻辑集成电路
页数	文件大小	规格书
11页	216K
描述
DIFFERENTIAL-TO-LVDS MULTIPLEXER

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中文翻译

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ICS85401AK 数据手册

ICS85401

2:1

TO-LVDS MULTIPLEXER

Integrated

Circuit

Systems, Inc.

IFFERENTIAL

GENERAL DESCRIPTION

FEATURES

The ICS85401 is a high performance 2:1 Differ- • 2:1 LVDS MUX

ICS

ential-to-LVDS Multiplexer and a member of the

• 1 LVDS output

HiPerClockS™

HiPerClockS™family of High Performance Clock

Solutions from ICS.The ICS85401 can also per-

form differential translation because the differ-

ential inputs accept LVPECL, CML as well as LVDS levels.

The ICS85401 is packaged in a small 3mm x 3mm

16 VFQFN package, making it ideal for use on space con-

strained boards.

• 2 differential clock inputs can accept: LVPECL, LVDS, CML

• Maximum input/output frequency: >2.5GHz

• Translates LVCMOS/LVTTL input signals to LVDS levels by

using a resistor bias network on nCLK0, nCLK1

• Propagation delay: 460ps (maximum)

• Part-to-part skew: 100ps (maximum)

• 3.3V operating supply

• -40°C to 85°C ambient operating temperature

BLOCK DIAGRAM

PIN ASSIGNMENT

CLK0

nCLK0

16 15 14 13

CLK0

12 GND

10 nQ

GND

nCLK0

CLK1

nCLK1

CLK1

nCLK1

CLK_SEL

ICS85401

16-LeadVFQFN

3mm x 3mm x 0.95 package body

K Package

TopView

85401AK

www.icst.com/products/hiperclocks.html

REV. A FEBRUARY 22, 2005

12 3 4 5 6 7...11

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ICS85401AKLF	IDT	获取价格	Multiplexer, 85401 Series, 1-Func, 2 Line Input, 1 Line Output, Complementary Output, 3 X
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