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ICS8533AGI-01T PDF预览

ICS8533AGI-01T

更新时间: 2024-11-06 12:02:43
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
17页 217K
描述
DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER 3.3V operating supply

ICS8533AGI-01T 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP20,.25针数:20
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.72输入调节:DIFFERENTIAL MUX
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
长度:6.5 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:20
实输出次数:4最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):240电源:3.3 V
Prop。Delay @ Nom-Sup:1.5 ns传播延迟(tpd):1.5 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.03 ns
座面最大高度:1.2 mm子类别:Clock Drivers
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:20
宽度:4.4 mmBase Number Matches:1

ICS8533AGI-01T 数据手册

 浏览型号ICS8533AGI-01T的Datasheet PDF文件第2页浏览型号ICS8533AGI-01T的Datasheet PDF文件第3页浏览型号ICS8533AGI-01T的Datasheet PDF文件第4页浏览型号ICS8533AGI-01T的Datasheet PDF文件第5页浏览型号ICS8533AGI-01T的Datasheet PDF文件第6页浏览型号ICS8533AGI-01T的Datasheet PDF文件第7页 
ICS8533I-01  
LOW SKEW, 1-TO-4  
DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER  
GENERAL DESCRIPTION  
The ICS8533I-01 is a low skew, high perfor-  
mance 1-to-4 Differential-to-3.3V LVPECL  
Fanout Buffer and a member of the HiPerClockS™  
family of High Performance Clock Solutions from  
IDT. The ICS8533I-01 has two selectable clock  
ICS  
HiPerClockS™  
FEATURES  
Four differential 3.3V LVPECL outputs  
Selectable differential CLK, nCLK or LVPECL clock inputs  
inputs. The CLK, nCLK pair can accept most standard dif-  
ferential input levels. The PCLK, nPCLK pair can accept  
LVPECL, CML, or SSTL input levels. The clock enable is  
internally synchronized to eliminate runt pulses on the out-  
puts during asynchronous assertion/deassertion of the clock  
enable pin.  
CLK, nCLK pair can accept the following differential  
input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL  
PCLK, nPCLK supports the following input types:  
LVPECL, CML, SSTL  
Maximum output frequency: 650MHz  
Translates any single-ended input signal to 3.3V  
Guaranteed output and part-to-part skew characteristics  
make the ICS8533I-01 ideal for those applications demand-  
ing well defined performance and repeatability.  
LVPECL levels with resistor bias on nCLK input  
Output skew: 30ps (maximum)  
Part-to-part skew: 150ps (maximum)  
Propagation delay: 1.5ns (maximum), CLK/nCLK  
Additive phase jitter, RMS: 0.060ps (typical)  
3.3V operating supply  
-40°C to 85°C ambient operating temperature  
Available in both standard (RoHS5) and lead-free (RoHS 6)  
packages  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
1
2
3
4
5
6
7
8
9
10  
Q0  
D
VEE  
CLK_EN  
CLK_SEL  
CLK  
nCLK  
PCLK  
nPCLK  
nc  
CLK_EN  
nQ0  
VCC  
Q1  
nQ1  
Q2  
nQ2  
VCC  
Q3  
Q
LE  
CLK  
nCLK  
PCLK  
0
1
Q0  
nQ0  
nPCLK  
Q1  
nQ1  
nc  
VCC  
CLK_SEL  
nQ3  
Q2  
nQ2  
ICS8533I-01  
20-Lead TSSOP  
Q3  
nQ3  
6.5mm x 4.4mm x 0.92mm package body  
G Package  
Top View  
8533AGI-01  
1
REV. A DECEMBER 6, 2007  

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