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ICS84320AK01 PDF预览

ICS84320AK01

更新时间： 2024-11-03 11:14:39
品牌 Logo 应用领域
矽成 - ICSI /
页数 文件大小 规格书
16页 377K
描述
780MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER

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ICS84320AK01 数据手册

 浏览型号ICS84320AK01的Datasheet PDF文件第2页浏览型号ICS84320AK01的Datasheet PDF文件第3页浏览型号ICS84320AK01的Datasheet PDF文件第4页浏览型号ICS84320AK01的Datasheet PDF文件第5页浏览型号ICS84320AK01的Datasheet PDF文件第6页浏览型号ICS84320AK01的Datasheet PDF文件第7页 
PRELIMINARY  
ICS84320-01K  
Integrated  
Circuit  
Systems, Inc.  
780MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL  
LVPECL FREQUENCY SYNTHESIZER  
GENERAL DESCRIPTION  
FEATURES  
The ICS84320-01K is a general purpose, dual out- • Dual differential 3.3V LVPECL outputs  
ICS  
put Crystal-to-3.3V Differential LVPECL High Fre-  
quency Synthesizer and a member of the  
HiPerClockS™ family of High Performance Clock  
Solutions from ICS.The ICS84320-01K has a se-  
• Selectable crystal oscillator interface  
or LVCMOS/LVTTLTEST_CLK  
HiPerClockS™  
• Output frequency range: 77.5MHz to 780MHz  
• Crystal input frequency range: 14MHz to 40MHz  
• VCO range: 620MHz to 780MHz  
lectable TEST_CLK or crystal inputs. The VCO operates at a  
frequency range of 620MHz to 780MHz. The VCO frequency  
is programmed in steps equal to the value of the input refer-  
ence or crystal frequency. The VCO and output frequency  
can be programmed using the serial or parallel interfaces to  
the configuration logic. The low phase noise characteristics  
of the ICS84320-01K make it an ideal clock source for 10 Giga-  
bit Ethernet, SONET, and Serial Attached SCSI applications.  
• Parallel or serial interface for programming counter  
and output dividers  
• Duty cycle: 49% - 51% (N > 1)  
• RMS period jitter: 2.0ps (typical)  
• RMS phase jitter at 155.52MHz, using a 38.88MHz crystal  
(12KHz to 20MHz): 2.5ps (typical)  
Phase noise: 155.52MHz (typical), using a 38.88MHz crystal  
Offset  
Noise Power  
100Hz ..................-90.5 dBc/Hz  
1KHz ................ -114.2 dBc/Hz  
10KHz ................ -123.6 dBc/Hz  
100KHz ................ -128.1 dBc/Hz  
• 3.3V supply voltage  
• 0°C to 70°C ambient operating temperature  
BLOCK DIAGRAM  
VCO_SEL  
PIN ASSIGNMENT  
XTAL_SEL  
TEST_CLK  
0
32 31 30 29 28 27 26 25  
XTAL1  
1
M5  
M6  
M7  
M8  
N0  
N1  
nc  
OSC  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
XTAL2  
XTAL2  
TEST_CLK  
XTAL_SEL  
VCCA  
ICS84320-01K  
10 11 12 13 14 15 16  
32-LeadVFQFN  
S_LOAD  
S_DATA  
S_CLOCK  
MR  
PLL  
÷ N  
PHASE DETECTOR  
÷ 1  
÷ 2  
÷ 4  
÷ 8  
MR  
0
1
VEE  
VCO  
FOUT0  
nFOUT0  
FOUT1  
nFOUT1  
9
÷ M  
S_LOAD  
S_DATA  
S_CLOCK  
nP_LOAD  
CONFIGURATION  
INTERFACE  
LOGIC  
TEST  
5mm x 5mm x 0.95 package body  
K Package  
M0:M8  
N0:N1  
TopView  
The Preliminary Information presented herein represents a product in prototyping or pre-production.The noted characteristics are based on initial  
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.  
84320AK-01  
www.icst.com/products/hiperclocks.html  
REV. A FEBRUARY 6, 2004  
1
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