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ICS843002AGI-01LFT PDF预览

ICS843002AGI-01LFT

更新时间: 2024-11-02 05:12:19
品牌 Logo 应用领域
矽成 - ICSI /
页数 文件大小 规格书
15页 206K
描述
FEMTOCLOCKS-TM CRYSTAL-TO- 3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER

ICS843002AGI-01LFT 数据手册

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ICS843002I-01  
FEMTOCLOCKS™ CRYSTAL-TO-  
3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER  
Integrated  
Circuit  
Systems, Inc.  
GENERAL DESCRIPTION  
FEATURES  
The ICS843002I-01 is a 2 output LVPECL Two 3.3V or 2.5V LVPECL outputs  
ICS  
HiPerClockS™  
synthesizer optimized to generate Ethernet  
reference clock frequencies and is a member  
of the HiPerClocksTM family of high perfor-  
mance clock solutions from ICS. Using a  
• Selectable crystal oscillator interface  
or LVCMOS/LVTTL single-ended input  
• Supports the following output frequencies:  
156.25MHz, 125MHz and 62.5MHz  
25MHz 18pF parallel resonant crystal, the following  
frequencies can be generated based on the 2 frequency  
select pins (F_SEL[1:0]): 156.25MHz, 125MHz, and  
62.5MHz. The ICS843002I-01 uses ICS’ FemtoClockTM  
low phase noise VCO technology and can achieve 1ps  
or lower typical rms phase jitter, easily meeting Ethernet  
jitter requirements. The ICS843002I-01 is packaged in a  
small 20-pin TSSOP package.  
• VCO range: 560MHz - 680MHz  
• RMS phase jitter @ 156.25MHz, using a 25MHz crystal  
(1.875MHz-20MHz): 0.55ps (typical)  
• Output skew: 30ps (maximum)  
• SupplyVoltage Modes  
Core/Outputs  
3.3/3.3  
2.5/2.5  
• -40°C to 85°C ambient operating temperature  
• Available in both standard and lead-free RoHS-compliant  
packages  
FREQUENCY SELECT FUNCTION TABLE  
PIN ASSIGNMENT  
Inputs  
1
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
nc  
VCCO  
VCCO  
Output Frequency  
2
3
4
5
6
7
8
9
Q1  
nQ1  
VEE  
VCC  
nXTAL_SEL  
REF_CLK  
XTAL_IN  
XTAL_OUT  
F_SEL1  
M Divider N Divider  
(25MHz Ref.)  
F_SEL1 F_SEL0  
Q0  
nQ0  
MR  
nPLL_SEL  
nc  
VCCA  
F_SEL0  
VCC  
Value  
Value  
0
0
1
1
0
1
0
1
25  
4
156.25 (default)  
25  
25  
25  
5
10  
5
125  
62.5  
125  
10  
ICS843002I-01  
20-Lead TSSOP  
6.5mm x 4.4mm x 0.92mm  
package body  
BLOCK DIAGRAM  
Pulldown  
2
F_SEL[1:0]  
G Package  
Top View  
Q0  
Pulldown  
nPLL_SEL  
F_SEL[1:0]  
nQ0  
0 0 ÷4 (default)  
0 1 ÷5  
1 0 ÷10  
Pulldown  
25MHz  
REF_CLK  
XTAL_IN  
1
0
1 1 ÷5  
1
Q1  
nQ1  
VCO  
Phase  
Detector  
OSC  
625MHz  
0
(w/25MHz  
Reference)  
XTAL_OUT  
nXTAL_SEL  
Pulldown  
M = 25 (fixed)  
Pulldown  
MR  
843002AGI-01  
www.icst.com/products/hiperclocks.html  
REV.A JANUARY 6, 2006  
1

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