Datasheet > ICS8430-61

ICS8430-61

更新时间： 2024-11-01 21:55:27

品牌	Logo	应用领域
矽成 - ICSI		/
页数	文件大小	规格书
15页	176K
描述
500MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER

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ICS8430-61 数据手册

ICS8430-61

Integrated

Circuit

Systems, Inc.

500MH

, CRYSTAL

TO-3.3V DIFFERENTIAL

LVPECL FREQUENCY

SYNTHESIZER

GENERAL DESCRIPTION

FEATURES

The ICS8430-61 is a general purpose, dual output • Dual differential 3.3V LVPECL outputs

ICS

Crystal-to-3.3V Differential LVPECL High Fre-

quency Synthesizer and a member of the

or LVCMOS/LVTTLTEST_CLK

• Selectable crystal oscillator interface

HiPerClockS™

HiPerClockS™ family of High Performance Clock

Solutions from ICS.The ICS8430-61 has a select-

• Output frequency range: 20.83MHz to 500MHz

• Crystal input frequency range: 14MHz to 27MHz

• VCO range: 250MHz to 500MHz

able TEST_CLK or crystal inputs. The VCO operates at a fre-

quency range of 250MHz to 500MHz. The VCO frequency is

programmed in steps equal to the value of the input reference

or crystal frequency. The VCO and output frequency can be

programmed using the serial or parallel interfaces to the con-

figuration logic. Frequency steps as small as 1MHz can be

achieved using a 16MHz crystal or TEST_CLK.

• Parallel or serial interface for programming counter

and output dividers

• RMS period jitter: 6ps (maximum)

• Cycle-to-cycle jitter: 30ps (maximum)

• 3.3V supply voltage

• 0°C to 70°C ambient operating temperature

BLOCK DIAGRAM

PIN ASSIGNMENT

VCO_SEL

XTAL_SEL

TEST_CLK

32 31 30 29 28 27 26 25

XTAL_IN

OSC

XTAL_IN

TEST_CLK

XTAL_SEL

V^CCA

XTAL_OUT

÷ 16

÷1

ICS8430-61

÷1.5

S_LOAD

S_DATA

S_CLOCK

PLL

÷2

÷3

PHASE DETECTOR

÷4

÷6

VEE

VCO

÷8

FOUT0

nFOUT0

FOUT1

nFOUT1

÷12

10 11 12 13 14 15 16

÷ M

S_LOAD

S_DATA

S_CLOCK

nP_LOAD

CONFIGURATION

INTERFACE

LOGIC

TEST

32-Lead LQFP

7mm x 7mm x 1.4mm package body

M0:M8

N0:N2

Y Package

TopView

8430AY-61

www.icst.com/products/hiperclocks.html

REV. A JULY 22, 2004

12 3 4 5 6 7...15

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