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ICS83940DYI-01LFT PDF预览

ICS83940DYI-01LFT

更新时间: 2024-11-25 11:14:35
品牌 Logo 应用领域
矽成 - ICSI /
页数 文件大小 规格书
13页 260K
描述
LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER

ICS83940DYI-01LFT 数据手册

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PRELIMINARY  
ICS83940I-01  
Integrated  
Circuit  
Systems, Inc.  
L
OW  
SKEW, 1-TO-18  
LVPECL-TO-LVCMOS / LVTTL FANOUT  
BUFFER  
FEATURES  
GENERAL DESCRIPTION  
18 LVCMOS/LVTTL outputs, 23typical output impedance  
Selectable LVCMOS_CLK or LVPECL clock inputs  
The ICS83940I-01 is a low skew, 1-to-18  
ICS  
LVPECL-to-LVCMOS/LVTTL Fanout Buffer and a  
member of the HiPerClockS™ family of High Per-  
formance Clock Solutions from ICS. The  
ICS83940I-01 has two selectable clock inputs.  
HiPerClockS™  
LVCMOS_CLK supports the following input types:  
LVCMOS or LVTTL  
The PCLK, nPCLK pair can accept LVPECL, CML or SSTL  
input levels. The single ended clock input accepts LVCMOS  
or LVTTL input levels. The low impedance LVCMOS/LVTTL  
outputs are designed to drive 50series or parallel termi-  
nated transmission lines.The effective fanout can be increased  
from 18 to 36 by utilizing the ability of the outputs to drive two  
series terminated lines.  
PCLK, nPCLK supports the following input types:  
LVPECL, CML, SSTL  
Maximum output frequency: 250MHz  
Output skew: 150ps (maximum)  
Part-to-part skew: 750ps (maximum)  
Full 3.3V, 2.5V or mixed 3.3V, 2.5V supply modes  
-40°C to 85°C ambient operating temperature  
The ICS83940I-01 is characterized at full 3.3V, full 2.5V and  
mixed 3.3V input and 2.5V output operating supply modes. Guar-  
anteed output and part-to-part skew characteristics make the  
ICS83940I-01 ideal for those clock distribution applications de-  
manding well defined performance and repeatability.  
Pin compatible with the MPC940L in single supply  
applications  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
32 31 30 29 28 27 26 25  
Q6  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
GND  
GND  
CLK_SEL  
Q7  
Q8  
LVCMOS_CLK  
CLK_SEL  
PCLK  
PCLK  
0
nPCLK  
18  
VDDO  
Q9  
ICS83940I-01  
Q0:Q17  
1
LVCMOS_CLK  
Q10  
Q11  
GND  
nPCLK  
VDD  
VDDO  
9
10 11 12 13 14 15 16  
32-Lead LQFP  
Y Pacakge  
7mm x 7mm x 1.4mm package body  
TopView  
The Preliminary Information presented herein represents a product in prototyping or pre-production.The noted characteristics are based on initial  
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.  
83940DYI-01  
www.icst.com/products/hiperclocks.html  
REV. A MARCH 1, 2004  
1

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