PRELIMINARY
ICS8344
Integrated
Circuit
Systems, Incꢀ
LOW SKEW, 1-TO-24
DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER
GENERAL DESCRIPTION
FEATURES
The ICS8344 is a low voltage, low skew fanout
• 24 LVCMOS outputs, 7Ω typical output impedance
,&6
buffer and a member of the HiPerClockS™
family of High Performance Clock Solutions from
ICS. The ICS8344 is designed to translate any
differential signal levels to LVCMOS levels. The
• Output frequency up to 167MHz
HiPerClockS™
• 275ps output skew, 600ps part to part skew
• Translates any differential input signal (PECL, HSTL, LVDS)
to LVCMOS without external bias networks
low impedance LVCMOS outputs are designed to drive 50Ω
series or parallel terminated transmission lines. The effective
fanout can be increased to 48 by utilizing the ability of the
outputs to drive two series terminated lines. Redundant clock
applications can make use of the dual clock input. The dual
clock inputs also facilitate board level testing. ICS8344 is
characterized at full 3.3V, full 2.5V and mixed 3.3V input and
2.5V output operating supply modes.
• Translates any single-ended input signal to LVCMOS with
resistor bias on nCLK input
• Translates and inverts any single-ended input signal to
LVCMOS with resistor bias on CLK input
• Multiple differential clock input pairs for redundant clock
applications
Guaranteed output and part-to-part skew characteristics
make the ICS8344 ideal for those clock distribution applica-
tions demanding well defined performance and repeatability.
• LVCMOS control inputs
• Multiple output enable pins for disabling unused outputs in
reduced fanout applications
• 3.3V, 2.5V or mixed 3.3V, 2.5V operating supply modes
• 48 lead low-profile QFP(LQFP), 7mm x 7mm x 1.4mm
package body, 0.5mm package lead pitch
• 0°C to 70°C ambient operating temperature
• Industrial temperature versions available upon request
BLOCK DIAGRAM
PIN ASSIGNMENT
CLK_SEL
48 47 46 45 44 43 42 41 40 39 38 37
Q16
Q17
1
36
35
34
33
32
31
30
29
28
27
26
25
Q7
CLK0
nCLK0
2
0
Q6
VDDO
GND
Q18
3
VDDO
GND
Q5
CLK1
4
1
nCLK1
Q0 - Q7
OE1
5
Q19
6
Q4
ICS8344
Q20
7
Q3
Q21
8
Q2
O8 - Q15
VDDO
GND
Q22
9
VDDO
GND
Q1
10
11
12
OE2
O16 - Q23
Q23
Q0
13 14 15 16 17 18 19 20 21 22 23 24
OE3
48-Lead LQFP
Y Package
Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
8344
www.icst.com
REV. B FEBRUARY 2, 2001
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