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ICS83054I PDF预览

ICS83054I

更新时间: 2024-11-03 11:14:35
品牌 Logo 应用领域
矽成 - ICSI 复用器
页数 文件大小 规格书
13页 155K
描述
4 : 1, SINGLE-ENDED MULTIPLEXER

ICS83054I 数据手册

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ICS83054I  
Integrated  
Circuit  
Systems, Inc.  
4:1, SINGLE-ENDED MULTIPLEXER  
GENERAL DESCRIPTION  
FEATURES  
The ICS83054I is a low skew, 4:1, Single- • 4:1 single-ended multiplexer  
ended Multiplexer and a member of the  
ICS  
• Q nominal output impedance: 7Ω (VDDO =3 .3V)  
HiPerClockS™  
HiPerClockS™ family of High Performance  
Clock Solutions from ICS. The ICS83054I  
has four selectable single-ended clock inputs  
• Maximum output frequency: 250MHz  
• Propagation delay: 3ns (maximum), VDD = VDDO = 3.3V  
• Input skew: 225ps (maximum), VDD = VDDO = 3.3V  
• Part-to-part skew: 475ps (maximum), VDD = VDDO = 3.3V  
and one single-ended clock output. The output has a  
VDDO pin which may be set at 3.3V, 2.5V, or 1.8V, making  
the device ideal for use in voltage translation applications.  
An output enable pin places the output in a high  
impedance state which may be useful for testing or  
debug. The device operates up to 250MHz and is pack-  
aged in a 16 TSSOP.  
Operating supply modes:  
VDD/VDDO  
3.3V/3.3V  
3.3V/2.5V  
3.3V/1.8V  
2.5V/2.5V  
2.5V/1.8V  
-40°C to 85°C ambient operating temperature  
• Available in both standard and lead-free RoHS-compliant  
packages  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
1
2
3
4
5
6
7
8
Q
nc  
OE  
CLK3  
GND  
nc  
SEL1  
CLK2  
16  
15  
14  
13  
12  
11  
10  
9
VDDO  
nc  
CLK0  
nc  
VDD  
nc  
CLK0  
CLK1  
Q
CLK2  
CLK1  
SEL0  
CLK3  
ICS83054I  
16-LeadTSSOP  
SEL1  
SEL0  
4.4mm x 5.0mm x 0.92mm package body  
G Package  
OE  
Top View  
83054AGI  
www.icst.com/products/hiperclocks.html  
REV.A JANUARY 3, 2006  
1

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