Datasheet > ICS650-11B

ICS650-11B

更新时间： 2022-11-08 01:04:28

品牌	Logo	应用领域
矽成 - ICSI		时钟
页数	文件大小	规格书
4页	66K
描述
BroadCom Networking Clock Synthesizer

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ICS650-11B 数据手册

PRELIMINARY INFORMATION

ICS650-11B

BroadCom Networking Clock Synthesizer

Description

Features

The ICS650-11B is a low cost, low jitter, high

performance clock synthesizer customized for

BroadCom. Using analog Phase-Locked Loop

(PLL) techniques, the device accepts a 25.0 MHz

clock or fundamental mode crystal input to

produce multiple output clocks of 25.0 MHz,

33.33 MHz, 66.66 MHz, 100.0 MHz, and

133.33 MHz. All output clocks are frequency

locked together. The ICS650-11B outputs all

have 0 ppm synthesis error.

• Packaged in 20 pin narrow SSOP (Pb free available)

• 25.00 MHz fundamental crystal or clock input

• Five fixed output clocks of 25.0 MHz, 33.33 MHz,

66.66 MHz, 100.0 MHz, and 133.33 MHz

• Zero ppm synthesis error in all clocks

• Ideal for BroadCom BCM5600/BCM5400 chipset

• Full CMOS output swing

• Advanced, low power, sub-micron CMOS process

• 3.0V to 5.5V operating voltage

• Industrial temperature range

Block Diagram

VDD GND

Output

33.33 MHz

Buffer

Output

66.66 MHz

Buffer

Clock Synthesis

and Control

Circuitry

Output

Buffer

100.0 MHz

Output

Buffer

25.00 MHz

crystal or clock

133.33 MHz

Clock

Buffer/

Crystal

Output

Buffer

25.00 MHz

Oscillator

Optional crystal capacitors are shown and may be required for tuning of initial accuracy (determined once per board).

MDS 650-11B C

Revision 012005

Printed 11/14/04

Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126•(408)295-9800tel• www.icst.com

12 3 4

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