5秒后页面跳转
ICS527-04 PDF预览

ICS527-04

更新时间: 2024-09-16 11:14:27
品牌 Logo 应用领域
矽成 - ICSI 时钟
页数 文件大小 规格书
9页 168K
描述
Clock Slicer User Configurable PECL input Zero Delay Buffer

ICS527-04 数据手册

 浏览型号ICS527-04的Datasheet PDF文件第2页浏览型号ICS527-04的Datasheet PDF文件第3页浏览型号ICS527-04的Datasheet PDF文件第4页浏览型号ICS527-04的Datasheet PDF文件第5页浏览型号ICS527-04的Datasheet PDF文件第6页浏览型号ICS527-04的Datasheet PDF文件第7页 
ICS527-04  
Clock Slicer User Configurable PECL input Zero Delay Buffer  
Description  
Features  
The ICS527-04 Clock Slicer is the most flexible way to  
generate an output clock from an input clock with zero  
skew. The user can easily configure the device to  
produce nearly any output clock that is multiplied or  
divided from the input clock. The part supports  
non-integer multiplications and divisions. Using  
Phase-Locked Loop (PLL) techniques, the device  
accepts an input clock up to 200 MHz and produces an  
output clock up to 160 MHz.  
Packaged as 28-pin SSOP (150 mil body)  
Synchronizes fractional clocks rising edges  
CMOS in to PECL out  
PECL in to PECL out  
Pin selectable dividers  
Zero input to output skew  
User determines the output frequency - no software  
needed  
Slices frequency or period  
The ICS527-04 aligns rising edges on PECLIN with  
FBPECL at a ratio determined by the reference and  
feedback dividers.  
Input clock frequency of 1.5 MHz - 200 MHz  
Output clock frequencies up to 160 MHz  
Very low jitter  
Duty cycle of 45/55  
Operating voltage of 3.3 V  
For other PECL output clocks, see the ICS507-01,  
ICS525-03, or the MK3707. For PECL in and CMOS  
out, see the ICS527-02. For CMOS in and PECL out  
with zero delay, use the ICS527-03.  
Advanced, low power CMOS process  
Block Diagram  
R6:R0  
7
560 ohm  
VDD  
VDD  
2
VDD  
RES  
VCO  
Divide  
by 2  
68 ohm  
1
0
Reference  
Divider  
PECLIN  
PECLIN  
PECLO  
PECLO  
180 ohm  
Phase Comparator,  
Charge Pump, and  
Loop Filter  
Output  
Divider  
VDD  
Divide  
by 2  
FBPECL  
1
0
Feedback  
Divider  
68 ohm  
FBPECL  
180 ohm  
2
2
GND  
7
IRANGE  
F6:F0  
S1:S0  
MDS 527-04 D  
1
Revision 122804  
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  

与ICS527-04相关器件

型号 品牌 获取价格 描述 数据表
ICS527R-01 ICSI

获取价格

Clock Slicer⑩ User Configurable Zero Delay Bu
ICS527R-01I ICSI

获取价格

Clock Slicer⑩ User Configurable Zero Delay Bu
ICS527R-01IT ICSI

获取价格

Clock Slicer⑩ User Configurable Zero Delay Bu
ICS527R-01T ICSI

获取价格

Clock Slicer⑩ User Configurable Zero Delay Bu
ICS527R-02 ICSI

获取价格

Clock Slicer User Configurable PECL Input Zero Delay Buffer
ICS527R-02I ICSI

获取价格

Clock Slicer User Configurable PECL Input Zero Delay Buffer
ICS527R-02ILFT IDT

获取价格

PLL Based Clock Driver, 527 Series, 2 True Output(s), 0 Inverted Output(s), CMOS, PDSO28,
ICS527R-02IT ICSI

获取价格

Clock Slicer User Configurable PECL Input Zero Delay Buffer
ICS527R-02LF IDT

获取价格

PLL Based Clock Driver, 527 Series, 2 True Output(s), 0 Inverted Output(s), CMOS, PDSO28,
ICS527R-02T ICSI

获取价格

Clock Slicer User Configurable PECL Input Zero Delay Buffer