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ICS525R-07LF PDF预览

ICS525R-07LF

更新时间: 2024-09-14 20:18:39
品牌 Logo 应用领域
SPECTRUM 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
9页 181K
描述
Clock Generator, 200MHz, CMOS, PDSO28, 0.150 INCH, ROHS COMPLIANT, MO-153, SSOP-28

ICS525R-07LF 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:SSOP,针数:28
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.73
JESD-30 代码:R-PDSO-G28长度:9.9 mm
端子数量:28最高工作温度:70 °C
最低工作温度:最大输出时钟频率:200 MHz
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
主时钟/晶体标称频率:50 MHz认证状态:Not Qualified
座面最大高度:1.75 mm最大供电电压:2.25 V
最小供电电压:1.6 V标称供电电压:1.8 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
宽度:3.9 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

ICS525R-07LF 数据手册

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PRELIMINARY INFORMATION  
ICS525-07/08  
LVCMOS User Configurable Clock  
Description  
Features  
Packaged as 28-pin SSOP (150 mil body)  
Available in Pb (lead) free package  
The ICS525-07/08 are the most flexible way to  
generate a high-quality clock output from an  
inexpensive crystal or clock input at low supply  
voltages. The user can configure the device to produce  
nearly any output frequency from any input frequency  
by grounding or floating the select pins or by driving or  
hard wiring the select pins high or low. Neither  
microcontroller, software, nor device programmer are  
needed to set the frequency. Using Phase-Locked  
Loop (PLL) techniques, the device accepts a standard  
fundamental mode, inexpensive crystal to produce  
output clocks up to 250 MHz. It can also produce a  
highly accurate output clock from a given input clock,  
keeping them frequency locked.  
User determines the output frequency by setting all  
internal dividers  
Eliminates need for custom oscillators  
Low voltage operation  
Pull-ups on all select inputs  
Input crystal frequency of 5 - 27 MHz  
Input clock frequency of 2 - 50 MHz  
Compensated loop bandwidth  
Enhanced low frequency operation (-08 version)  
Low jitter  
For similar capability with a serial interface, use the  
ICS307.  
Duty cycle of 45/55 up to 200 MHz  
Operating voltage of 1.8 V to 2.5 V  
Ideal for oscillator replacement  
This product is intended for clock generation. It has low  
output jitter (variation in the output period), but input to  
output skew is not defined nor guaranteed.  
Available in commercial and industrial temperature  
ranges  
Block Diagram  
VDD  
2
PD  
REF  
hase Comparato
Reference  
Divider  
Crystal  
Oscillator  
VCO  
Charge Pump, and  
Crystal or clock  
Loop Filter  
Output  
Divider  
X2  
input  
CLK  
Divider  
VCO  
Optional crystal capacitors  
2
GND  
R Configuration Pins  
V Configuration Pins  
S Configuration Pins  
MDS 525-07/08 A  
1
Revision 101105  
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  

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