Datasheet > ICS448G-16T

ICS448G-16T

更新时间： 2024-11-14 11:14:27

品牌	Logo	应用领域
矽成 - ICSI		时钟
页数	文件大小	规格书
7页	123K
描述
Networking Clock Synthesizer

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ICS448G-16T 数据手册

ICS448-16

Networking Clock Synthesizer

Description

Features

The ICS448-16 generates four high-quality,

high-frequency clock outputs. It is designed to replace

multiple crystals and crystal oscillators in networking

applications. Using ICS’ patented Phase-Locked Loop

(PLL) techniques, the device runs from a 25 MHz

crystal or clock input.

• Packaged in 16-pin TSSOP

• Replaces multiple crystals and oscillators

• Input crystal or clock frequency of 25 MHz

• Zero ppm frequency synthesis error

• Fixed output frequencies of 25 MHz and 48 MHz

• Selectable output frequencies of 24 MHz, 48 MHz,

50 MHz and 66.6666 MHz

• Duty cycle of 45/55

• Operating voltage of 3.3 V

• Advanced, low power CMOS process

Block Diagram

VDD

SEL

PLL1

PLL2

CLK1

CLK2

PLL3

48M

25M

Crystal

Oscillator/

Clock

25 MHz clock

or crystal input

Buffer

GND

External capacitors

may be required.

PDTS (all outputs and PLLs)

MDS 448-16 E

Revision 031605

Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com

12 3 4 5 6 7

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