Datasheet > ICS308RIT

ICS308RIT

更新时间： 2024-11-10 22:25:03

品牌	Logo	应用领域
矽成 - ICSI		/
页数	文件大小	规格书
8页	135K
描述
SERIAL PROGRAMMABLE QUAD PLL VERSACLOCK SYNTHESIZER

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ICS308RIT 数据手册

ICS308

SERIAL PROGRAMMABLE QUAD PLL VERSACLOCK SYNTHESIZER

Description

Features

The ICS308 is a versatile serially programmable, quad

PLL clock source. The ICS308 can generate any

frequency from 250 kHz to 200 MHz, and up to 6

different output frequencies simultaneously. The

outputs can be reprogrammed on the fly, and will lock to

a new frequency in 10 ms or less. Smooth transitions

(in which the clock duty cycle remains roughly 50%) are

guaranteed if the output divider is not changed.

• Packaged in 20-pin SSOP (QSOP)

• Operating voltage of 3.3 V

• Highly accurate frequency generation

•M/N Multiplier PLL: M = 1..2048, N = 1..1024

• Serially programmable: user determines the output

frequency via a 3-wire interface

• Eliminates need for custom quartz oscillators

• Input crystal frequency of 5 - 27 MHz

•Optional programmable on-chip crystal capacitors

• Output clock frequencies up to 200 MHz

• Reference clock output

The device includes a PDTS pin which tri-states the

output clocks and powers down the entire chip.

The ICS308 default for non-programmed start-up are

buffered reference clock outputs on all clock output

pins.

• Power down tri-state mode

• Very low jitter

Block Diagram

VDD

CLK1

CLK2

PLL1

PLL2

PLL3

PLL4

STROBE

SCLK

CLK3

Divide

Logic

and

Output

Enable

Control

CLK4

DATA

CLK5

CLK6

CLK7

CLK8

CLK9

Crystal or

clock input

X1/ICLK

Crystal

Oscillator

GND

External capacitors are

required with a crystal input.

PDTS

MDS 308 F

Revision 090704

Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com

12 3 4 5 6 7 8

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