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ICS281PGI PDF预览

ICS281PGI

更新时间: 2024-02-27 22:23:45
品牌 Logo 应用领域
矽成 - ICSI 晶体外围集成电路光电二极管时钟
页数 文件大小 规格书
8页 167K
描述
Triple PLL Field Prog. Spread Spectrum Clock Synthesizer

ICS281PGI 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:0.173 INCH, ROHS COMPLIANT, TSSOP-16针数:16
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.84
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:5 mm湿度敏感等级:1
端子数量:16最高工作温度:70 °C
最低工作温度:最大输出时钟频率:200 MHz
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260主时钟/晶体标称频率:166 MHz
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

ICS281PGI 数据手册

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PRELIMINARY INFORMATION  
ICS281  
Triple PLL Field Prog. Spread Spectrum Clock Synthesizer  
Description  
Features  
Packaged as 16-pin TSSOP  
The ICS281 field programmable spread spectrum  
clock synthesizer generates up to three high-quality,  
high-frequency clock outputs including multiple  
reference clocks from a low-frequency crystal input. It  
is designed to replace crystals, crystal oscillators and  
stand alone spread spectrum devices in most  
electronic systems.  
Eight addressable registers  
Replaces multiple crystals and oscillators  
Output frequencies up to 200 MHz at 3.3 V  
Configurable Spread Spectrum Modulation  
Input crystal frequency of 5 to 27 MHz  
Input clock frequency of 3 to 166 MHz  
Up to three reference outputs  
TM  
Using ICS’ VersaClock software to configure PLLs  
and outputs, the ICS281 contains a One-Time  
Programmable (OTP) ROM for field programmability.  
Programming features include input/output  
frequencies, spread spectrum amount and eight  
selectable configuration registers.  
Operating voltages of 3.3 V  
VDDO output control from 1.8 V to 3.3 V  
Controllable output drive levels  
Advanced, low-power CMOS process  
Available in Pb (lead) free packaging  
Using Phase-Locked Loop (PLL) techniques, the  
device runs from a standard fundamental mode,  
inexpensive crystal, or clock. It can replace multiple  
crystals and oscillators, saving board space and cost.  
The ICS281 is also available in factory programmed  
custom versions for high-volume applications.  
Block Diagram  
3
VDDO  
VDD  
PLL1 with  
Spread  
Spectrum  
3
S2:S0  
OTP  
ROM  
CLK1  
CLK2  
CLK3  
with PLL  
Values  
Divide  
Logic  
and  
Output  
Enable  
Control  
PLL2  
PLL3  
Crystal or  
clock input  
X1/ICLK  
Crystal  
Oscillator  
X2  
3
GND  
External capacitors  
are required with a crystal input.  
PDTS  
MDS 281 C  
1
Revision 062205  
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  

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