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ICS2495M

更新时间: 2024-11-08 22:48:15
品牌 Logo 应用领域
矽成 - ICSI 时钟发生器
页数 文件大小 规格书
7页 317K
描述
Dual Video/Memory Clock Generator

ICS2495M 数据手册

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ICS2495  
Integrated  
Circuit  
Systems, Inc.  
Dual Video/Memory Clock Generator  
Features  
Buffered Xtal Out  
Low cost - eliminates need for multiple crystal clock  
oscillators in video display subsystems  
Mask-programmable frequencies  
Integral Loop Filter components  
Fast acquisition of selected frequencies, strobed or non-  
strobed  
Pre-programmed versions for Industry Standard VGA  
chips  
Glitch-free frequency transitions  
Guaranteed performance up to 135 MHz  
Excellent power supply rejection  
Advanced PLL for low phase-jitter  
Frequency change detection circuitry enhances new fre-  
quency acquisition and eliminates problems caused by  
programs that rewrite frequency information  
Internalclock remains lockedwhen theexternalfrequency  
input is selected  
Low power CMOS device technology  
Small footprint - 16-pin DIP or SOIC  
Description  
Pin Configuration  
The ICS2495 Clock Generator is an integrated circuit dual  
phase-lockedloop frequencysynthesizer capableof generating  
16 video frequencies and 4 memory clock frequencies for use  
withhigh performance videodisplay systems. UtilizingCMOS  
technology to implement all linear, digital and memory func-  
tions, the ICS2495 provides a low-power, small-footprint,  
low-cost solutiontothegenerationofvideo dotclocks. Outputs  
arecompatiblewith XGA, VGA, EGA, MCGA, CGA, MDA,  
as well as the higher frequencies needed for advanced applica-  
tions in desktop publishing and workstation graphics. Provi-  
sion is made via a single level custom mask to implement  
customer specific frequency sets. Phase-locked loop circuitry  
permits rapid glitch-free transitions between clock frequencies.  
XTAL2  
EXTFREQ  
FS0  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
XTAL1  
VCLK  
XTALOUT  
VSS  
FS1  
STROBE  
FS2  
VDD  
In addition to providing 16 clock rates, the ICS2495 has  
provisions to multiplex an externally-generated signal source  
into the VCLK signal path. Internal phase-locked frequencies  
continue to remain locked attheir presetvalues whenthis mode  
is selected. This feature permits instantaneous transition from  
an external frequency to an internally-generated frequency.  
Printedcircuitboardtestingissimplifiedbytheuseofthesemodes  
as an external clock generated by the ATE tester can be fed  
through, permitting synchronous testing of the entire system.  
N/C  
FS3  
MCLK  
MS1  
MS0  
16-Pin DIP or SOIC  
Notes:  
1. ICS2495M(SOIC) pinout is identical to ICS2495N(DIP).  
ICS2595RevA090694  

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