ICS1893BFILF

更新时间： 2024-01-09 00:29:41

品牌	Logo	应用领域
艾迪悌 - IDT		网络接口电信集成电路电信电路光电二极管
页数	文件大小	规格书
138页	1445K
描述
3.3-V 10Base-T/100Base-TX Integrated PHYceiver™

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技术参数
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ICS1893BFILF 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	DFN
包装说明：	HVQCCN, LCC56,.31SQ,20	针数：	56
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.31
Is Samacsys：	N	数据速率：	100000 Mbps
JESD-30 代码：	S-PQCC-N56	JESD-609代码：	e3
长度：	8 mm	湿度敏感等级：	3
功能数量：	1	端子数量：	56
收发器数量：	1	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	HVQCCN	封装等效代码：	LCC56,.31SQ,20
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260	电源：	3.3 V
认证状态：	Not Qualified	座面最大高度：	1 mm
子类别：	Network Interfaces	最大压摆率：	0.16 mA
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	电信集成电路类型：	INTERFACE CIRCUIT
温度等级：	COMMERCIAL	端子面层：	Matte Tin (Sn) - annealed
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	30
宽度：	8 mm	Base Number Matches：	1

ICS1893BFILF 数据手册

Integrated Device Technology, Inc.

Document Type: Data Sheet

ICS1893BF

Document Stage: Rev. E Release

3.3-V 10Base-T/100Base-TX Integrated PHYceiver™

General

Features

The ICS1893BF is a low-power, physical-layer device (PHY)

that supports the ISO/IEC 10Base-T and 100Base-TX

Carrier-Sense Multiple Access/Collision Detection

(CSMA/CD) Ethernet standards, ISO/IEC 8802-3.

• Supports category 5 cables with attenuation in excess of

24dB at 100 MHz.

• Single-chip, fully integrated PHY provides PCS, PMA, PMD,

and AUTONEG sub layers functions of IEEE standard.

The ICS1893BF is intended for MII, Node applications that

require the Auto-MDIX feature that automatically corrects

crossover errors in plant wiring.

• 10Base-T and 100Base-TX IEEE 8802.3 compliant

• Single 3.3V power supply

The ICS1893BF incorporates Digital-Signal Processing (DSP)

control in its Physical-Medium Dependent (PMD) sub layer. As

a result, it can transmit and receive data on unshielded

twisted-pair (UTP) category 5 cables with attenuation in

excess of 24 dB at 100MHz. With this ICS-patented

technology, the ICS1893BF can virtually eliminate errors from

killer packets.

• Highly configurable, supports:

– Media Independent Interface (MII)

– Auto-Negotiation with Parallel detection

– Node applications, managed or unmanaged

– 10M or 100M full and half-duplex modes

– Loopback mode for Diagnostic Functions

– Auto-MDI/MDIX crossover correction

The ICS1893BF provides a Serial-Management Interface for

exchanging command and status information with a

Station-Management (STA) entity. The ICS1893BF

Media-Dependent Interface (MDI) can be configured to

provide either half- or full-duplex operation at data rates of 10

Mb/s or 100Mb/s.

• Low-power CMOS (typically 400 mW)

• Power-Down mode typically 21mW

• Clock and crystal supported

• Fully integrated, DSP-based PMD includes:

– Adaptive equalization and baseline-wander correction

– Transmit wave shaping and stream cipher scrambler

– MLT-3 encoder and NRZ/NRZI encoder

The ICS1893BF is available in a 300-mil 48-lead SSOP

package. The ICS1893BF shares the same proven

performance circuitry with the ICS1893AF but is not a

pin-for-pin replacement of the 1893AF. An application note for

a dual footprint layout to accommodate ICS1893AF or

ICS1893BF is available on the ICS website.

• Small footprint 48-pin 300 mil. SSOP package

• Also available in small footprint 56-pin 8x8 MLF2 package

• Available in Industrial Temp and Lead Free

Applications: NIC cards, PC motherboards, switches,

routers, DSL and cable modems, game machines,

printers.

NOTE: EOL for non-green parts to occur on

5/13/10 per PDN U-09-01

ICS1893BF Block Diagram

100Base-T

PCS

PMA

TP_PMD

•

Framer

CRS/COL

Detection

Parallel to Serial

4B/5B

•

Clock Recovery

Link Monitor

Signal Detection

Error Detection

•

MLT-3

10/100 MII

MAC

Interface

Twisted-

Pair

Interface to

Magnetics

Modulesand

RJ45

Interface

MUX

Integrated

Switch

Stream Cipher

Adaptive Equalizer

Baseline Wander

Correction

•

10Base-T

Connector

MII

Low-Jitter

Clock

Synthesizer

Auto-

Negotiation

Configuration

and Status

Extended

Set

MII

Management

Interface

Clock

Power

LEDs and PHY

Address

IDT reserves the right to make changes in the device data identified in

this publication without further notice. IDT advises its customers to

obtain the latest version of all device data to verify that any information

being relied upon by the customer is current and accurate.

ICS1893BF, Rev. E, 8/11/09

August, 2009

12 3 4 5 6 7...138

中文翻译

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与ICS1893BFILF相关器件

型号	品牌	获取价格	描述	数据表
ICS1893BFILFT	IDT	获取价格	3.3-V 10Base-T/100Base-TX Integrated PHYceive
ICS1893BFILFT	ICSI	获取价格	3.3-V 10Base-T/100Base-TX Integrated PHYceiver
ICS1893BFIT	IDT	获取价格	3.3-V 10Base-T/100Base-TX Integrated PHYceive
ICS1893BFIT	ICSI	获取价格	3.3-V 10Base-T/100Base-TX Integrated PHYceiver
ICS1893BFLF	IDT	获取价格	3.3-V 10Base-T/100Base-TX Integrated PHYceive
ICS1893BFLF	ICSI	获取价格	3.3-V 10Base-T/100Base-TX Integrated PHYceiver
ICS1893BFLFT	ICSI	获取价格	3.3-V 10Base-T/100Base-TX Integrated PHYceiver
ICS1893BFLFT	IDT	获取价格	3.3-V 10Base-T/100Base-TX Integrated PHYceive
ICS1893BFT	IDT	获取价格	3.3-V 10Base-T/100Base-TX Integrated PHYceive
ICS1893BFT	ICSI	获取价格	3.3-V 10Base-T/100Base-TX Integrated PHYceiver

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