Datasheet > ICS180M-51LF

ICS180M-51LF

更新时间： 2024-09-23 04:22:51

品牌	Logo	应用领域
矽成 - ICSI		时钟发生器
页数	文件大小	规格书
6页	95K
描述
Low EMI Clock Generator

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中文翻译

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ICS180M-51LF 数据手册

ICS180-51

Low EMI Clock Generator

Description

Features

The ICS180-51 generates a low EMI output clock from

a clock or crystal input. The device uses ICS’

proprietary mix of analog and digital Phase-Locked

Loop (PLL) technology to spread the frequency

spectrum of the output, thereby reducing the frequency

amplitude peaks by several dB.

• Pin and function compatible to Cypress W180-51

• Packaged in 8-pin SOIC

• Provides a spread spectrum output clock

• Accepts a clock input and provides same frequency

dithered output

• Input frequency of 8 to 28 MHz

The ICS180-51 offers center spread selection of

+/-0.625% and +/-1.875%. Refer to the MK1714-01/02

for the widest selection of input frequencies and

multipliers.

• Peak reduction by 7dB - 14dB typical on 3rd - 19th

odd harmonics

• Spread percentage selection for +/-0.625% and

+/-1.875%

ICS offers a complete line of EMI reducing clock

generators. Consult us when you need to remove

crystals and oscillators from your board.

• Operating voltage of 3.3 V and 5 V

• Advanced, low-power CMOS process

Block Diagram

VDD

FS2:1

SS%

PLL Clock

Synthesis

and Spread

Spectrum

Circuitry

CLK

X1/CLKIN

Clock Buffer/

Crystal

Oscillator

GND

MDS 180-51 A

Revision 110404

Integrated Circuit Systemsl525 Race Street, San Jose, CA 95126 l tel (408) 297-1201 l www.icst.com

12 3 4 5 6

中文翻译

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