ICL8052/ICL71C03,
ICL8068/ICL71C03
1
August 1997
Precision 4 / Digit, A/D Converter
2
Features
Description
• Typically Less Than 2µV
Scale, lCL8068)
Noise (200.00mV Full
The ICL8052 or ICL8068/lCL71C03 chip pairs with their
multiplexed BCD output and digit drivers are ideally suited
P-P
for the visual display DVM/DPM market. The outstanding
4 / digit accuracy, 200.00mV to 2.0000V full scale capabil-
2
ity, auto-zero and auto-polarity combine with true ratiometric
operation, almost ideal differential linearity and time-proven
dual slope conversion. Use of these chip pairs eliminates
clock feedthrough problems, and avoids the critical board
layout usually required to minimize charge injection.
• Accuracy Guaranteed to ±1 Count Over Entire ±20,000
Counts (2.0000V Full Scale)
1
• Guaranteed Zero Reading for 0V Input
• True Polarity at Zero Count for Precise Null Detection
• Single Reference Voltage Required
When only 2000 counts of resolution are required, the 71C03
1
• Over-Range and Under-Range Signals Available for
Auto-Ranging Capability
can be wired for 3 / digits and give up to 30 readings/sec.,
2
making it ideally suited for a wide variety of applications.
• All Outputs TTL Compatible
The ICL71C03 is an improved CMOS plug-in replacement for
the lCL7103 and should be used in all new designs.
• Medium Quality Reference, 40ppm (Typ) on Board
• Blinking Display Gives Visual Indication of Over
Range
Ordering Information
TEMP.
PKG.
NO.
• Six Auxiliary Inputs/Outputs are Available for
Interfacing to UARTs, Microprocessors or Other
Complex Circuitry
o
PART NUMBER RANGE ( C)
PACKAGE
14 Ld PDIP
ICL8052CPD
lCL8052CDD
lCL8052ACPD
ICL8052ACDD
ICL8068CDD
ICL8068ACDD
lCL8068ACJD
ICL71C03CPl
lCL71C03ACPl
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
E14.3
14 Ld CERDIP
14 Ld PDIP
F14.3
E14.3
F14.3
F14.3
F14.3
F14.3
E28.6
E28.6
• 5pA Input Current (Typ) (8052A)
14 Ld CERDIP
14 Ld CERDIP
14 Ld CERDIP
14 Ld CERDIP
28 Ld PDIP
28 Ld PDIP
Pinouts
ICL8052/ICL8068
(CERDIP, PDIP)
TOP VIEW
ICL71C03 (PDIP)
TOP VIEW
V+
1
2
3
4
5
6
7
8
9
28 BUSY
1
1
2
4 / / 3 /
27 D (LSD)
1
V-
COMP OUT
REF CAP
1
2
3
4
5
6
7
14 INT OUT
13 +BUFF IN
12 +INT IN
11 -INT IN
2
-1.2V
26 D
2
POL
25 D
3
RUN/HOLD
COMP IN
24 D
4
REF BYPASS
GND
V-
23 B (MSB)
8
V
10 -BUFF IN
REFERENCE
REF. CAP. 1
REF. CAP. 2
22 B
4
REF
21 B
2
1
REF OUT
9
8
BUFF OUT
V++
20
B
(LSB)
ICL8052/
ICL8068
REF SUPPLY
ANALOG IN 10
ANALOG GND 11
CLOCK IN 12
19 D (MSD)
5
18 STROBE
17 A-Z IN
UNDER-RANGE 13
OVER-RANGE 14
16 A-Z OUT
15 DIGITAL GND
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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File Number 3081.1
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