IC80C54
IC80C58
IC80C54
IC80C58
CMOS SINGLE CHIP
8-BIT MICROCONTROLLER
FEATURES
GENERAL DESCRIPTION
The ICSI IC80C54 and IC80C58 are high-performance
microcontroller fabricated using high-density CMOS
technology. The CMOS IC80C54/58 is functionally
compatible with the industry standard 80C52/32
microcontrollers.
• 80C52 based architecture
• 16K x 8 ROM (80C54)
32K x 8 ROM (80C58)
• 256 x 8 RAM
The IC80C54/58 is designed with 16K x 8 ROM (IC80C54
)and 32Kx8 ROM (IC80C58); 256 x 8 RAM; 32
programmable I/O lines; a serial I/O port for either
multiprocessorcommunications,I/Oexpansionorfullduplex
UART; three 16-bit timer/counters; an eight-source, two-
priority-level, nested interrupt structure; and an on-chip
oscillator and clock circuit. The IC80C54/58 can be
expanded using standard TTL compatible memory.
• Three 16-bit Timer/Counters
• Full duplex serial channel
• Boolean processor
• Four 8-bit I/O ports, 32 I/O lines
• Memory addressing capability
– 64K ROM and 64K RAM
• Program memory lock
– Lock bits (2)
• Power save modes:
– Idle and power-down
T2/P1.0
T2EX/P1.1
P1.2
1
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VCC
2
P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
EA
• Eight interrupt sources
3
• Most instructions execute in 0.3 µs
• CMOS and TTL compatible
P1.3
4
P1.4
5
• Maximum speed: 40 MHz @ Vcc = 5V
P1.5
6
P1.6
7
• Packages available:
– 40-pin DIP
P1.7
8
RST
9
– 44-pin PLCC
– 44-pin PQFP
RxD/P3.0
TxD/P3.1
INT0/P3.2
INT1/P3.3
T0/P3.4
T1/P3.5
WR/P3.6
RD/P3.7
XTAL2
XTAL1
GND
10
11
12
13
14
15
16
17
18
19
20
ALE
PSEN
P2.7/A15
P2.6/A14
P2.5/A13
P2.4/A12
P2.3/A11
P2.2/A10
P2.1/A9
P2.0/A8
Figure 1. IC80C54/58 Pin Configuration: 40-pin DIP
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
Integrated Circuit Solution Inc.
MC003-0B
1