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IC62LV2568L-70HI PDF预览

IC62LV2568L-70HI

更新时间: 2024-11-12 22:45:39
品牌 Logo 应用领域
矽成 - ICSI 内存集成电路静态存储器光电二极管
页数 文件大小 规格书
10页 133K
描述
256K x 8 LOW POWER AND LOW Vcc CMOS STATIC RAM

IC62LV2568L-70HI 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:TSSOP, TSSOP32,.56,20Reach Compliance Code:unknown
风险等级:5.88最长访问时间:70 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-G32
JESD-609代码:e0内存密度:2097152 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
端子数量:32字数:262144 words
字数代码:256000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:256KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP32,.56,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH并行/串行:PARALLEL
电源:3/3.3 V认证状态:Not Qualified
最小待机电流:1.5 V子类别:SRAMs
最大压摆率:0.035 mA表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
Base Number Matches:1

IC62LV2568L-70HI 数据手册

 浏览型号IC62LV2568L-70HI的Datasheet PDF文件第2页浏览型号IC62LV2568L-70HI的Datasheet PDF文件第3页浏览型号IC62LV2568L-70HI的Datasheet PDF文件第4页浏览型号IC62LV2568L-70HI的Datasheet PDF文件第5页浏览型号IC62LV2568L-70HI的Datasheet PDF文件第6页浏览型号IC62LV2568L-70HI的Datasheet PDF文件第7页 
IC62LV2568L  
IC62LV2568LL  
256K x 8 LOW POWER and LOW VCC  
CMOS STATIC RAM  
ꢀEATURES  
DESCRIPTION  
The ICSI IC62LV2568L and IC62LV2568LL are low power  
and low VCC, 262,144-bit words by 8 bits CMOS static RAMs.  
They are fabricated using ICSI's high-performance CMOS  
technology. This highly reliable process coupled with innova-  
tive circuit design techniques, yields higher performance and  
low power consumption devices.  
• Access times of 55, 70, 100 ns  
• Low active power: 126 mW (max, L, LL)  
• Low standby power: 36 µW (max, L) and 7.2  
µW (max, LL) CMOS standby  
• Low data retention voltage: 1.5V (min.)  
• Available in Low Power (-L) and Ultra-Low  
Power (-LL)  
When CE1 is HIGH or CE2 is LOW (deselected), the device  
assumes a standby mode at which the power dissipation can  
be reduced by using CMOS input levels.  
• Output Enable (OE) and two Chip Enable  
• TTL compatible inputs and outputs  
• Single 2.7V-3.6V power supply  
Easy memory expansion is provided by using two Chip Enable  
inputs, CE1 and CE2. The active LOW Write Enable (WE)  
controls both writing and reading of the memory.  
• Available in the 32-pin 8x20mm TSOP-1, 32-pin  
8x13.4mm TSOP-1 and 48-pin 6*8mm Tꢀ-BGA  
The IC62LV2568L and IC62LV2568LL are available in 32-pin  
8*20mm TSOP-1, 8*13.4mm TSOP-1 and 48-pin 6*8mm T7-  
BGA.  
ꢀUNCTIONAL BLOCK DIAGRAM  
2048 x 128 x 8  
MEMORY ARRAY  
A0-A17  
DECODER  
VCC  
GND  
I/O  
DATA  
COLUMN I/O  
I/O0-I/O7  
CIRCUIT  
CE1  
CE2  
OE  
CONTROL  
CIRCUIT  
WE  
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors  
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.  
Integrated Circuit Solution Inc.  
LPSR001-0A 05/01/2001  
1

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