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IC62LV2568L-55B PDF预览

IC62LV2568L-55B

更新时间: 2024-11-12 22:45:39
品牌 Logo 应用领域
矽成 - ICSI 存储内存集成电路静态存储器
页数 文件大小 规格书
10页 133K
描述
256K x 8 LOW POWER AND LOW Vcc CMOS STATIC RAM

IC62LV2568L-55B 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:FBGA, BGA36,6X8,30Reach Compliance Code:unknown
风险等级:5.88Is Samacsys:N
最长访问时间:55 nsI/O 类型:COMMON
JESD-30 代码:R-PBGA-B36JESD-609代码:e0
内存密度:2097152 bit内存集成电路类型:STANDARD SRAM
内存宽度:8端子数量:36
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:256KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:FBGA封装等效代码:BGA36,6X8,30
封装形状:RECTANGULAR封装形式:GRID ARRAY, FINE PITCH
并行/串行:PARALLEL电源:3/3.3 V
认证状态:Not Qualified最小待机电流:1.5 V
子类别:SRAMs最大压摆率:0.04 mA
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:0.75 mm
端子位置:BOTTOMBase Number Matches:1

IC62LV2568L-55B 数据手册

 浏览型号IC62LV2568L-55B的Datasheet PDF文件第2页浏览型号IC62LV2568L-55B的Datasheet PDF文件第3页浏览型号IC62LV2568L-55B的Datasheet PDF文件第4页浏览型号IC62LV2568L-55B的Datasheet PDF文件第5页浏览型号IC62LV2568L-55B的Datasheet PDF文件第6页浏览型号IC62LV2568L-55B的Datasheet PDF文件第7页 
IC62LV2568L  
IC62LV2568LL  
256K x 8 LOW POWER and LOW VCC  
CMOS STATIC RAM  
ꢀEATURES  
DESCRIPTION  
The ICSI IC62LV2568L and IC62LV2568LL are low power  
and low VCC, 262,144-bit words by 8 bits CMOS static RAMs.  
They are fabricated using ICSI's high-performance CMOS  
technology. This highly reliable process coupled with innova-  
tive circuit design techniques, yields higher performance and  
low power consumption devices.  
• Access times of 55, 70, 100 ns  
• Low active power: 126 mW (max, L, LL)  
• Low standby power: 36 µW (max, L) and 7.2  
µW (max, LL) CMOS standby  
• Low data retention voltage: 1.5V (min.)  
• Available in Low Power (-L) and Ultra-Low  
Power (-LL)  
When CE1 is HIGH or CE2 is LOW (deselected), the device  
assumes a standby mode at which the power dissipation can  
be reduced by using CMOS input levels.  
• Output Enable (OE) and two Chip Enable  
• TTL compatible inputs and outputs  
• Single 2.7V-3.6V power supply  
Easy memory expansion is provided by using two Chip Enable  
inputs, CE1 and CE2. The active LOW Write Enable (WE)  
controls both writing and reading of the memory.  
• Available in the 32-pin 8x20mm TSOP-1, 32-pin  
8x13.4mm TSOP-1 and 48-pin 6*8mm Tꢀ-BGA  
The IC62LV2568L and IC62LV2568LL are available in 32-pin  
8*20mm TSOP-1, 8*13.4mm TSOP-1 and 48-pin 6*8mm T7-  
BGA.  
ꢀUNCTIONAL BLOCK DIAGRAM  
2048 x 128 x 8  
MEMORY ARRAY  
A0-A17  
DECODER  
VCC  
GND  
I/O  
DATA  
COLUMN I/O  
I/O0-I/O7  
CIRCUIT  
CE1  
CE2  
OE  
CONTROL  
CIRCUIT  
WE  
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors  
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.  
Integrated Circuit Solution Inc.  
LPSR001-0A 05/01/2001  
1

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