CrossLinkTM and CrossLinkPlusTM
Video Bridging FPGA Families
With the flexibility and fast time to market advantages of a FPGA, along with being optimized for power and
efficiency, Lattice’s CrossLink Families deliver the flexible, high bandwidth, low power and small footprint solutions
needed for video centric applications.
The CrossLink FPGA families resolve interface mismatches between application processors, image sensors, and
displays. The families provide an optimal solution for industrial machine vision, drones, AR / VR headsets, cameras,
ADA, mobile devices, human machine interfaces (HMIs), and more.
Key Features
■ MIPI® D-PHY bridging device that delivers up to 4K
UHD resolution at 12 Gbps bandwidth
■ Support for popular mobile, camera, display and
■ Lowest power programmable bridging solution in
legacy interfaces such as MIPI D-PHY, MIPI CSI-2,
MIPI DSI, CMOS, and SubLVDS, LVDS, and more
active mode. Built-in sleep mode.
■ Industry’s smallest package size with a 6 mm2
■ Comprehensive IP library and reference designs
accelerate system development
option
CrossLink™
CrossLinkPlus™
LIF-MD6000-6MG81 LIF-MD6000-6JMG80 LIF-MD6000-6KMG80
LIF-MD6000-6UWG64 LIF-MD6000-6UMG64
LIF-MDF6000-6UMG64 LIF-MDF6000-6KMG80
Device
LIA-MD6000-6MG811 LIA-MD6000-6JMG801 LIA-MD6000-6KMG801
LUTs
5936
180
47
1
5936
180
47
1
5936
180
47
1
5936
180
47
1
5936
180
47
1
5936
180
47
1
5936
180
47
1
Embedded Memory kbits
Distrib. RAM
GPLL
kbits
D-PHY PLL
1
2
2
2
2
2
2
Embedded I2C Blocks
2
1
2
2
2
2
2
2
2
2
2
2
2
2
Embedded RX/TX
MIPI D-PHY
(4 Data + 1 Clock) (8 Data + 2 Clock) (8 Data + 2 Clock) (8 Data + 2 Clock) (8 Data + 2 Clock) (8 Data + 2 Clock) (8 Data + 2 Clock)
48 MHz Oscillator
10 kHz Oscillator
1
1
1
1
1
1
1
1
1
NVCM
Yes
1
NVCM
Yes
1
NVCM
Yes
1
NVCM
Yes
1
1
Configuration Memory
Dual Boot
NVCM
Yes
Yes
Yes
Flash
Flash
Yes
Yes
Yes
Yes
Power Management Unit
Low Power Sleep Mode
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Typical Operational Power 5 mW – 135 mW
5 mW – 135 mW
5 mW – 135 mW
5 mW – 135 mW
5 mW – 135 mW
5 mW – 135 mW
5 mW - 135 mW
Footprint
Package Pitch
GPIO
2.5 mm x 2.5 mm 3.5 mm x 3.5 mm 4.5 mm x 4.5 mm 6.5 mm x 6.5 mm 7.0 mm x 7.0 mm 3.5 mm x 3.5 mm 7.0 mm x 7.0 mm
0.4 mm
0.4 mm
0.5 mm
0.65 mm
0.65 mm
0.4 mm
0.65 mm
7
8
9
8
8
8
8
I/O
17
29
37
37
37
29
37
1) Automotive grade.
LATTICESEMI.COM
.