Datasheet > 存储 > DRAM> HYMD564726A8-H

HYMD564726A8-H

更新时间： 2024-11-18 05:38:51

品牌	Logo	应用领域
海力士 - HYNIX		动态存储器双倍数据速率
页数	文件大小	规格书
16页	265K
描述
Unbuffered DDR SDRAM DIMM

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中文翻译

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技术参数
数据手册

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HYMD564726A8-H 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	DIMM	包装说明：	DIMM, DIMM184
针数：	184	Reach Compliance Code：	unknown
ECCN代码：	EAR99	HTS代码：	8542.32.00.36
风险等级：	5.92	访问模式：	SINGLE BANK PAGE BURST
最长访问时间：	0.75 ns	其他特性：	AUTO/SELF REFRESH
最大时钟频率 (fCLK)：	133 MHz	I/O 类型：	COMMON
JESD-30 代码：	R-XDMA-N184	内存密度：	4831838208 bit
内存集成电路类型：	DDR DRAM MODULE	内存宽度：	72
功能数量：	1	端口数量：	1
端子数量：	184	字数：	67108864 words
字数代码：	64000000	工作模式：	SYNCHRONOUS
最高工作温度：	70 °C	最低工作温度：
组织：	64MX72	输出特性：	3-STATE
封装主体材料：	UNSPECIFIED	封装代码：	DIMM
封装等效代码：	DIMM184	封装形状：	RECTANGULAR
封装形式：	MICROELECTRONIC ASSEMBLY	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	2.5 V	认证状态：	Not Qualified
刷新周期：	8192	自我刷新：	YES
子类别：	Other Memory ICs	最大供电电压 (Vsup)：	2.7 V
最小供电电压 (Vsup)：	2.3 V	标称供电电压 (Vsup)：	2.5 V
表面贴装：	NO	技术：	CMOS
温度等级：	COMMERCIAL	端子形式：	NO LEAD
端子节距：	1.27 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	Base Number Matches：	1

HYMD564726A8-H 数据手册

64Mx72 bits

Unbuffered DDR SDRAM DIMM

HYMD564726A(L)8-M/K/H/L

Preliminary

DESCRIPTION

Hynix HYMD564726A(L)8-M/K/H/L series is unbuffered 184-pin double data rate Synchronous DRAM Dual In-Line

Memory Modules (DIMMs) which are organized as 64Mx72 high-speed memory arrays. Hynix HYMD564726A(L)8-M/

K/H/L series consists of nine 64Mx8 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy substrate.

Hynix HYMD564726A(L)8-M/K/H/L series provide a high performance 8-byte interface in 5.25" width form factor of

industry standard. It is suitable for easy interchange and addition.

Hynix HYMD564726A(L)8-M/K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous

operations referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs

are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both ris-

ing and falling edges of it. The data paths are internally pipelined and 2-bit prefetched to achieve very high bandwidth.

All input and output voltage levels are compatible with SSTL_2. High speed frequencies, programmable latencies and

burst lengths allow variety of device operation in high performance memory system.

Hynix HYMD564726A(L)8-M/K/H/L series incorporates SPD(serial presence detect). Serial presence detect function is

implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify

DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.

FEATURES

•

512MB (64M x 72) Unbuffered DDR DIMM based on

64Mx8 DDR SDRAM

•

Data(DQ), Data strobes and Write masks latched on

both rising and falling edges of the clock

•

JEDEC Standard 184-pin dual in-line memory mod-

ule (DIMM)

Data inputs on DQS centers when write (centered

DQ)

•

Error Check Correction (ECC) Capability

2.5V +/- 0.2V VDD and VDDQ Power supply

Data strobes synchronized with output data for read

and input data for write

•

Programmable CAS Latency 2 / 2.5 supported

All inputs and outputs are compatible with SSTL_2

interface

Programmable Burst Length 2 / 4 / 8 with both

sequential and interleave mode

•

Fully differential clock operations (CK & /CK) with

100MHz / 133MHz

•

tRAS Lock-out function supported

All addresses and control inputs except Data, Data

strobes and Data masks latched on the rising edges

of the clock

Internal four bank operations with single pulsed RAS

Auto refresh and self refresh supported

8192 refresh cycles / 64ms

ORDERING INFORMATION

Part No.

Power Supply

Clock Frequency

Interface

Form Factor

HYMD564726A(L)8-M

HYMD564726A(L)8-K

HYMD564726A(L)8-H

HYMD564726A(L)8-L

133MHz (DDR266 2-2-2)

133MHz (DDR266A)

133MHz (DDR266B)

100MHz (DDR200)

VDD=2.5V

VDDQ=2.5V

184pin Unbuffered DIMM

5.25 x 1.25 x 0.15 inch

SSTL_2

This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

responsibility for use of circuits described. No patent licenses are implied.

Rev. 0.1/Feb. 2003

12 3 4 5 6 7...16

中文翻译

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与HYMD564726A8-H相关器件

型号	品牌	获取价格	描述	数据表
HYMD564726A8J-D4	HYNIX	获取价格	Unbuffered DDR SDRAM DIMM
HYMD564726A8J-D43	HYNIX	获取价格	Unbuffered DDR SDRAM DIMM
HYMD564726A8J-J	HYNIX	获取价格	Unbuffered DDR SDRAM DIMM
HYMD564726A8-K	HYNIX	获取价格	Unbuffered DDR SDRAM DIMM
HYMD564726A8-L	HYNIX	获取价格	Unbuffered DDR SDRAM DIMM
HYMD564726A8-M	HYNIX	获取价格	Unbuffered DDR SDRAM DIMM
HYMD564726AL8-H	HYNIX	获取价格	Unbuffered DDR SDRAM DIMM
HYMD564726AL8-K	HYNIX	获取价格	Unbuffered DDR SDRAM DIMM
HYMD564726AL8-L	HYNIX	获取价格	Unbuffered DDR SDRAM DIMM
HYMD564726AL8-M	HYNIX	获取价格	Unbuffered DDR SDRAM DIMM

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