Datasheet > HY57V281620AT

HY57V281620AT

更新时间： 2024-09-22 23:57:11

阅读下载

中文翻译

获取价格

如果您发现信息不准确，欢迎纠错

HY57V281620AT 数据手册

HY57V281620A

Revision History

Revision 1.1 (Dec. 2000)

•

Added -7 Bining product.

- In Ordering Information.

- In Capacitacne

- In DC Characteristics-ll

- In AC Characteristics-l, ll

Eleminated -10 Bining product.

Changed DC Characteristics-ll.

•

- tCK

to 15ns from min in Test condition

- -K IDD4 CL2 to 120mA from 100mA

- -K IDD5

to 240mA from 200mA.

•

Added Burst-Read-Single-Write commend in Commend Truth Table

1.2 : Hynix Change

1.3 : Burst read sigle write mode correction

12 3 4 5 6 7...14

中文翻译

下载PDF

型号	品牌	获取价格	描述	数据表
HY57V281620AT-10	ETC	获取价格	x16 SDRAM
HY57V281620AT-6	HYNIX	获取价格	4 Banks x 2M x 16bits Synchronous DRAM
HY57V281620AT-7	HYNIX	获取价格	4 Banks x 2M x 16bits Synchronous DRAM
HY57V281620AT-8	HYNIX	获取价格	4 Banks x 2M x 16bits Synchronous DRAM
HY57V281620AT-H	HYNIX	获取价格	4 Banks x 2M x 16bits Synchronous DRAM
HY57V281620AT-HI	HYNIX	获取价格	4 Banks x 2M x 16bits Synchronous DRAM
HY57V281620AT-I	ETC	获取价格	8Mx16\|3.3V\|4K\|K\|SDR SDRAM - 128M
HY57V281620AT-K	HYNIX	获取价格	4 Banks x 2M x 16bits Synchronous DRAM
HY57V281620AT-KI	HYNIX	获取价格	4 Banks x 2M x 16bits Synchronous DRAM
HY57V281620AT-P	HYNIX	获取价格	4 Banks x 2M x 16bits Synchronous DRAM