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HY29F400ABT-70 PDF预览

HY29F400ABT-70

更新时间: 2024-09-16 04:44:03
品牌 Logo 应用领域
海力士 - HYNIX 闪存存储内存集成电路光电二极管ISM频段
页数 文件大小 规格书
40页 591K
描述
4 Megabit (512Kx8/256Kx16) 5 Volt-only Flash Memory

HY29F400ABT-70 技术参数

生命周期:Obsolete零件包装代码:TSOP
包装说明:TSOP1, TSSOP48,.8,20针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.8
Is Samacsys:N最长访问时间:70 ns
备用内存宽度:8启动块:BOTTOM
命令用户界面:YES数据轮询:YES
耐久性:100000 Write/Erase CyclesJESD-30 代码:R-PDSO-G48
JESD-609代码:e6长度:18.4 mm
内存密度:4194304 bit内存集成电路类型:FLASH
内存宽度:16功能数量:1
部门数/规模:1,2,1,7端子数量:48
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:256KX16
封装主体材料:PLASTIC/EPOXY封装代码:TSOP1
封装等效代码:TSSOP48,.8,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
电源:5 V编程电压:5 V
认证状态:Not Qualified就绪/忙碌:YES
座面最大高度:1.2 mm部门规模:16K,8K,32K,64K
最大待机电流:0.000005 A子类别:Flash Memories
最大压摆率:0.06 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:TIN BISMUTH
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL切换位:YES
类型:NOR TYPE宽度:12 mm
Base Number Matches:1

HY29F400ABT-70 数据手册

 浏览型号HY29F400ABT-70的Datasheet PDF文件第2页浏览型号HY29F400ABT-70的Datasheet PDF文件第3页浏览型号HY29F400ABT-70的Datasheet PDF文件第4页浏览型号HY29F400ABT-70的Datasheet PDF文件第5页浏览型号HY29F400ABT-70的Datasheet PDF文件第6页浏览型号HY29F400ABT-70的Datasheet PDF文件第7页 
HY29F400A  
4 Megabit (512Kx8/256Kx16) 5 Volt-only Flash Memory  
KEY FEATURES  
5 Volt Read, Program, and Erase  
– Minimizes system-level power requirements  
High Performance  
– Access times as fast as 50 ns  
Low Power Consumption  
– 20 mA typical active read current in byte  
mode, 28 mA typical in word mode  
– 30 mA typical program/erase current  
– 5 µA maximum CMOS standby current  
Compatible with JEDEC Standards  
– Package, pinout and command-set  
compatible with the single-supply Flash  
device standard  
Sector Protection  
– Any combination of sectors may be locked  
to prevent program or erase operations  
within those sectors  
Temporary Sector Unprotect  
– Allows changes in locked sectors  
(requires high voltage on RESET# pin)  
Internal Erase Algorithm  
– Automatically erases a sector, any  
combination of sectors, or the entire chip  
Internal Programming Algorithm  
– Automatically programs and verifies data  
at a specified address  
– Provides superior inadvertent write  
protection  
Fast Program and Erase Times  
– Byte programming time: 7 µs typical  
– Sector erase time: 1.0 sec typical  
– Chip erase time: 11 sec typical  
Data# Polling and Toggle Status Bits  
– Provide software confirmation of  
completion of program or erase  
operations  
Ready/Busy# Output (RY/BY#)  
– Provides hardware confirmation of  
completion of program and erase  
operations  
Sector Erase Architecture  
– Boot sector architecture with top and  
bottom boot block options available  
– One 16 Kbyte, two 8 Kbyte, one 32 Kbyte  
and seven 64 Kbyte sectors in byte mode  
– One 8 Kword, two 4 Kword, one 16 Kword  
and seven 32 Kword sectors in word mode  
– A command can erase any combination of  
sectors  
– Supports full chip erase  
Erase Suspend/Resume  
100,000 Program/Erase Cycles Minimum  
Space Efficient Packaging  
– Available in industry-standard 44-pin  
PSOP and 48-pin TSOP and reverse  
TSOP packages  
Temporarily suspends a sector erase  
operation to allow data to be read from, or  
programmed into, any sector not being  
erased  
GENERAL DESCRIPTION  
LOGIC DIAGRAM  
The HY29F400A is a 4 Megabit, 5 volt only CMOS  
Flash memory organized as 524,288 (512K) bytes  
or 262,144 (256K) words. The device is offered in  
industry-standard 44-pin PSOP and 48-pin TSOP  
packages.  
18  
8
7
A[17:0]  
CE#  
DQ[7:0]  
DQ[14:8]  
The HY29F400A can be programmed and erased  
in-system with a single 5-volt VCC supply. Internally  
generated and regulated voltages are provided for  
program and erase operations, so that the device  
does not require a high voltage power supply to  
perform those functions. The device can also be  
programmed in standard EPROM programmers.  
Access times as fast as 55 ns over the full operat-  
ing voltage range of 5.0 volts ± 10% are offered  
for timing compatibility with the zero wait state re-  
quirements of high speed microprocessors. A 55  
ns version operating over 5.0 volts ± 5% is also  
OE#  
DQ[15]/A-1  
WE#  
RESET#  
BYTE#  
RY/BY#  
Preliminary  
Revision 1.0, January 2002  

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