Datasheet > HXR45100

HXR45100

更新时间： 2023-12-20 18:46:30

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
2页	283K
描述
56Gb/s and 112Gb/s Linear TIA Receiver

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HXR45100 数据手册

Short-Form Datasheet

HXR45100

Single Channel 56Gbaud Linear TIA

The HXR45100 is an extension of low-power, single-

ended input, quad channel linear Trans-Impedance

Amplifier (TIA) array, and a member of the Optical

Receiver Transmitter Array (ORTA) product family.

Together with an array of PIN detectors or a group of

detectors, the HXR45100 can be used to design a

compact linear ROSA for next generation 400G

optical transceivers with advanced modulation

schemes in 56GBaud PAM4 applications.

Features

■

High receiver sensitivity for 112Gbps PAM4

Ethernet applications

■

Low power mode in 56GBaud applications

Power consumption as low as 158mW/channel

Industrial operating temperature range -40°C to

95°C

■

Up to 5kΩ typical differential gain

This TIA operates in a 3.3V supply or in a 2.9V

supply for low power consumption, providing

exceptionally low input referred noise density, wide

input optical power range, excellent linearity up to

3mA overload, and a high bandwidth. The chip is

designed with the patented adaptive biasing scheme.

Wide adjustable output voltage swing

Linear operation up to 3mAppSE overload with

internal AGC

■

Up to 43GHz typical bandwidth

10pA/√Hz input referred current noise density

RSSI, LOS and Rx Disable functions

I²C interface

Ordering Information

100G Lambda MSA and IEEE 802.3cd compliance

Part Number

HXR45100-DNJ

HXR45100-EVB

Die Size

Temp. Range

-40°C to +95°C

Room Temp.

Applications

1.365 x 1.115 mm

Evaluation Board

■

100G/400G Ethernet LR Linear ROSA and OBO

VPDS RSSI RX_DIS NOTINT

X=1

PD1

P1P

LOS

Filter

Z1P

Z1N

CONTROL

VCC VCCO VEE

SCL SDA CONF1 CONF2

Figure 1. Block Diagram

R08DS0239EU0101 Rev.1.01

Aug 13, 2021

Page 1

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