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HV510WG

更新时间: 2024-01-19 20:52:46
品牌 Logo 应用领域
超科 - SUPERTEX 转换器高压
页数 文件大小 规格书
5页 447K
描述
240V, 12-Channel Serial to Parallel Converter with High Voltage Push-Pull Outputs

HV510WG 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIE,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.91Is Samacsys:N
内置保护:TRANSIENT接口集成电路类型:SIPO BASED PERIPHERAL DRIVER
JESD-30 代码:X-XUUC-N24JESD-609代码:e0
功能数量:1端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出电流流向:SOURCE AND SINK封装主体材料:UNSPECIFIED
封装代码:DIE封装形状:UNSPECIFIED
封装形式:UNCASED CHIP峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
电源电压1-最大:240 V电源电压1-分钟:60 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:NO LEAD端子位置:UPPER
处于峰值回流温度下的最长时间:NOT SPECIFIED断开时间:6 µs
接通时间:6 µsBase Number Matches:1

HV510WG 数据手册

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HV510  
240V, 12-Channel Serial to Parallel Converter  
with High Voltage Push-Pull Outputs  
Ordering Information  
Package Options  
Recommended Operating  
VPP Max  
Device  
24 Lead SOW  
HV510WG  
Die  
HV510  
240V  
HV510X  
Features  
General Description  
HVCMOS® technology  
The HV510 is a low voltage serial to high voltage parallel con-  
verter with 12 high voltage push-pull outputs. This device has  
been designed to drive small capacitive loads such as piezo  
electric transducers. It can also be used in any application  
requiring multiple high voltage outputs, low current sourcing and  
sinking capabilities.  
Operating output voltage of 240V  
Low power level shifting from 5V to 240V  
Shift register speed 8MHz @ VDD = 5V  
12 latched data outputs  
The device consists of a 12-bit shift register, 12 latches, and  
control logic to perform the polarity select and blanking of the  
outputs. A DIR pin controls the direction of data shift through the  
device. With DIR grounded, DIOA is Data In and DIOB is Data Out;  
dataisshiftedfromHVOUT12toHVOUT1.WhenDIRisatlogichigh,  
DIOB is Data In and DIOA is Data Out: data is then shifted from  
HVOUT1 to HVOUT12. Data is shifted through the shift register on  
the low to high transition of the clock. Data output buffers are  
provided for cascading devices. Operation of the shift register is  
notaffectedbytheLE,BL,orthePOLinputs.Transferofdatafrom  
the shift register to the latch occurs when the LE is high. The data  
in the latch is stored during LE transition from high to low.  
Output polarity and blanking  
CMOS compatible inputs  
Forward and reverse shifting options  
Absolute Maximum Ratings1  
Supply voltage, VDD  
-0.5V to +6V  
Supply voltage, VPP  
VDD to 260V  
Logic input levels  
-0.5V to VDD +0.5V  
0.3A  
Ground current3  
High voltage supply current2  
Continuous total power dissipation3  
Operating temperature range  
Storage temperature range  
0.25A  
750mW  
-40°C to +85°C  
-65°C to +150°C  
Notes:  
1. All voltages are referenced to GND.  
2. Connection to all power and ground pads is required. Duty cycle is limited by  
the total power dissipated in the package.  
3. For operation above 25°C ambient derate linearly to 85°C at 12mW/°C.  
12/13/01  
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability  
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to  
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the  
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.  

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