HV507PG-G

更新时间： 2024-02-08 07:38:49

品牌	Logo	应用领域
超科 - SUPERTEX		转换器高压
页数	文件大小	规格书
5页	454K
描述
SIPO Based Peripheral Driver, CMOS, PQFP80, 20 X 14 MM, 3.40 MM HEIGHT, 0.80 MM PITCH, GREEN, PLASTIC, MO-112CB-1, QFP-80

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HV507PG-G 技术参数

生命周期：	Active	包装说明：	DIE,
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.68
内置保护：	TRANSIENT	接口集成电路类型：	SIPO BASED PERIPHERAL DRIVER
JESD-30 代码：	X-XUUC-N76	JESD-609代码：	e0
功能数量：	1	端子数量：	76
最高工作温度：	70 °C	最低工作温度：
输出电流流向：	SOURCE AND SINK	封装主体材料：	UNSPECIFIED
封装代码：	DIE	封装形状：	UNSPECIFIED
封装形式：	UNCASED CHIP	峰值回流温度（摄氏度）：	NOT SPECIFIED
认证状态：	Not Qualified	最大供电电压：	5.5 V
最小供电电压：	4.5 V	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	TIN LEAD
端子形式：	NO LEAD	端子位置：	UPPER
处于峰值回流温度下的最长时间：	NOT SPECIFIED	断开时间：	4 µs
接通时间：	4 µs	Base Number Matches：	1

HV507PG-G 数据手册

HV507

300V, 64-Channel Serial to Parallel Converter

with High Voltage Push-Pull Outputs

Ordering Information

Package Options

80-Lead Plastic

Recommended Operating

V_PPMax*

Device

Gullwing

Die

HV507

300V

HV507PG

HV507X

* Please consult factory for higher voltage operation.

Features

General Description

❏ HVCMOS^®technology

The HV507 is a low voltage serial to high voltage parallel con-

verter with 64 high voltage push-pull outputs. This device has

been designed for use as a printer driver for electrostatic applica-

tions. It can also be used in any application requiring multiple high

voltage outputs, low current sourcing and sinking capabilities.

❏ Operating output voltage of 300V

❏ Low power level shifting from 5V to 300V

❏ Shift register speed 8MHz @ V_DD= 5V

❏ 64 latched data outputs

The device consists of a 64-bit shift register, 64 latches, and

control logic to perform the polarity select and blanking of the

outputs. A DIR pin controls the direction of data shift through the

device. With DIR grounded, D_IOAis Data In and D_IOBis Data Out;

dataisshiftedfromHV_OUT64toHV_OUT1.WhenDIRisatlogichigh,

D_IOBis Data In and D_IOAis Data Out: data is then shifted from

HV_OUT1 to HV_OUT64. Data is shifted through the shift register on

the low to high transition of the clock. Data output buffers are

provided for cascading devices. Operation of the shift register is

notaffectedbytheLE,BL,orthePOLinputs.Transferofdatafrom

the shift register to the latch occurs when the LE is high. The data

in the latch is stored during LE transition from high to low.

❏ Output polarity and blanking

❏ CMOS compatible inputs

❏ Forward and reverse shifting options

Absolute Maximum Ratings¹

Supply voltage, V_DD

-0.5V to +6V

Supply voltage, V_PP

V_DDto 320V

Logic input levels

-0.5V to V_DD+0.5V

0.5A

Ground current³

High voltage supply current²

Continuous total power dissipation³

Operating temperature range

Storage temperature range

0.5A

1200mW

0°C to +70°C

-65°C to +150°C

Notes:

1. All voltages are referenced to GND.

2. Connection to all power and ground pads is required. Duty cycle is limited by

the total power dissipated in the package.

3. For operation above 25°C ambient derate linearly to 70°C at 26.7mW/°C.

12/13/01

Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability

indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to

workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the

Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.

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