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HV2301B1-G PDF预览

HV2301B1-G

更新时间: 2024-11-08 04:22:31
品牌 Logo 应用领域
超科 - SUPERTEX 复用器开关复用器或开关信号电路高压
页数 文件大小 规格书
9页 336K
描述
Low Charge Injection, 8-Channel, High Voltage, Enhanced Analog Switch with Bleed Resistors

HV2301B1-G 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:BCC包装说明:BCC,
针数:32Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.76
Is Samacsys:N其他特性:IT ALSO REQUIRES VPP (40V TO VNN +200V) AND VNN (-40V TO -160V) SUPPLY
模拟集成电路 - 其他类型:SINGLE-ENDED MULTIPLEXERJESD-30 代码:S-XBCC-B32
JESD-609代码:e3长度:6 mm
信道数量:8功能数量:1
端子数量:32标称断态隔离度:33 dB
通态电阻匹配规范:1.35 Ω最大通态电阻 (Ron):27 Ω
最高工作温度:70 °C最低工作温度:
封装主体材料:UNSPECIFIED封装代码:BCC
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
座面最大高度:0.8 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:YES最长断开时间:5000 ns
最长接通时间:5000 ns技术:CMOS
温度等级:COMMERCIAL端子面层:Matte Tin (Sn)
端子形式:BUTT端子节距:0.65 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6 mmBase Number Matches:1

HV2301B1-G 数据手册

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Supertex inc.  
HV2301  
Initial Release  
Low Charge Injection, 8-Channel, High Voltage,  
Enhanced Analog Switch with Bleed Resistors  
Features  
General Description  
The Supertex HV2301 is a low charge injection, 8-channel,  
high voltage analog switch integrated circuit (IC) with bleed  
resistors. The device can be used in applications requiring high  
voltage switching, controlled by low voltage control signals,  
such as medical ultrasound imaging, piezoelectric transducer  
driver, and printers. The built-in bleed resistors eliminate  
voltage built up on capacitive loads such as piezoelectric  
transducers. The HV2301 is an enhanced version of the  
HV232.  
► HVCMOS technology for high performance  
► Integrated bleed resistors on the outputs  
► 8 Channels of high voltage analog switch  
► 3.3V or 5V CMOS input logic level  
► 20MHz data shift clock frequency  
► Very low quiescent power dissipation-10µA  
► Low parasitic capacitance  
► DC to 10MHz analog signal frequency  
► -60dB typical off-isolation at 5MHz  
► CMOS logic circuitry for low power  
► Excellent noise immunity  
Input data is shifted into an 8-bit shift register that can then  
be retained in an 8-bit latch. To reduce any possible clock  
feed- through noise, the latch enable bar should be left high  
until all bits are clocked in. Data is clocked in during the rising  
edge of the clock. Using HVCMOS technology, this device  
combines high voltage bilateral DMOS switches and low  
power CMOS logic to provide efficient control of high voltage  
analog signals.  
► Cascadable serial data register with latches  
► Flexible operating supply voltages  
Applications  
► Medical ultrasound imaging  
► NDT metal flaw detection  
► Piezoelectric transducer drivers  
► Inkjet printer heads  
The device is suitable for various combinations of high  
voltage supplies, e.g., VPP/VNN: +40V/-160V, +100V/-100V,  
and +160V/-40V.  
► Optical MEMS modules  
Block Diagram  
LEVEL  
SHIFTERS  
OUTPUT  
SWITCHES  
LATCHES  
D
LE  
SW0  
SW1  
SW2  
CL  
D
LE  
CLK  
CL  
D
8-Bit  
LE  
Shift  
DIN  
CL  
Register  
DOUT  
D
SW6  
SW7  
LE  
CL  
D
LE  
CL  
VDD GND  
LE CLR  
VNN VPP  
RGND  
NR032106  
Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: (408) 222-8888 FAX: (408) 222-4895 www.supertex.com  
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