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HS3120-0 PDF预览

HS3120-0

更新时间: 2022-04-28 20:16:11
品牌 Logo 应用领域
APITECH /
页数 文件大小 规格书
3页 3671K
描述
Double Buffered 12-Bit MDAC

HS3120-0 数据手册

 浏览型号HS3120-0的Datasheet PDF文件第2页浏览型号HS3120-0的Datasheet PDF文件第3页 
HS 3120  
Data Converter Line  
Double Buffered 12-Bit MDAC  
FEATURES  
• M onolithic Construction  
• 12-Bit Resolution  
• 0.01% Non-Linearity  
• jup Compatible  
• 4-Quadrant M ultiplication  
• Latch-up Protected  
DESCRIPTION  
The HS 3120 is a precision monolithic 12-bit  
multiplying DAC with internal two-stage input  
storage registers for easy interfacing with  
microprocessor busses. It is packaged in a 28-pin DIP  
to give high I/O design flexibility.  
controls are level-triggered to allow static or dynamic  
operation.  
DOUBLE BUFFERED —The input registers are sectioned  
into 3 segments of 4 bits each, all individually  
addressable. The DAC register, following the input  
registers, is a parallel 12-bit register for holding the  
DAC data while the input registers are updated. Only  
the data held in the DAC register determines the  
analog output value of the converter.  
VERSATILE OUTPUTS —A total of 5 output lines are  
provided by the HS 3120 to allow unipolar and  
bipolar output connection with a minimum of  
external components. The feedback resistor is  
internal. The resistor ladder network termination is  
externally available, thus eliminating an external  
resistor for the 1 LSB offset in bipolar mode.  
M ICRO PROCESSOR COM PATIBLE — The HS 3120 has  
been designed for great flexibility in connecting to  
bus-oriented systems. The 12 data inputs are  
organized into 3 independent addressable 4-bit input  
registers such that the HS 3120 can be connected to  
either a 4, 8 or 16-bit data bus. The control logic of  
the HS 3120 includes chip enable and latch enable  
inputs for flexible memory mapping. All  
M ONOLITHIC CM OS CONSTRUCTION —The HS 3120  
is a one-chip CM OS circuit with a resistor ladder  
network designed for 0.01% linearity without laser  
trimming. Small chip size and high manufacturing  
yields result in greatly reduced cost.  
FUNCTIONAL DIAGRAM  
(M SB)  
(LSB)  
10 11 BIT 12  
2
3
4
5
6
7
8
9
V
4
1
BIT  
REF  
9
10 11 12  
13 14 15 16  
17 18 19 20  
INPUT REGISTER  
22  
25  
24  
23  
21  
CE  
HBE  
INPUT REGISTER  
INPUT REGISTER  
CONTROL  
LOGIC  
M BE  
LBE  
R
5
6
7
1
3
FB  
I
1
01  
LDAC  
DAC REGISTER  
12 BIT M DAC  
I
02  
FB  
FB  
4
3
R/  
R/  
2
2
HS 3120  
28  
26  
27  
GND  
8
2
LDTR  
V
V
GND  
DD1  
DD2  
165CedarHill Street,Marlborough,MA01752 Tel:508.485.6350 Fax: 508.485.5168  
www.SpectrumMicrowave.com  

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