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HPCL-817-W0AE PDF预览

HPCL-817-W0AE

更新时间: 2024-01-03 23:24:25
品牌 Logo 应用领域
安捷伦 - AGILENT /
页数 文件大小 规格书
6页 191K
描述
Transistor Output Optocoupler, 1-Element, 5000V Isolation

HPCL-817-W0AE 技术参数

是否Rohs认证: 符合生命周期:Obsolete
Reach Compliance Code:unknown风险等级:5.84
当前传输比率-最小值:80%最大正向电流:0.05 A
最大正向电压:1.4 V最大绝缘电压:5000 V
安装特点:THROUGH HOLE MOUNT元件数量:1
最大通态电流:0.05 A最高工作温度:100 °C
最低工作温度:-30 °C最大功率耗散:0.15 W
最长响应时间:0.000018 s子类别:Optocoupler - Transistor Outputs
表面贴装:NOBase Number Matches:1

HPCL-817-W0AE 数据手册

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Agilent HCPL-817  
Phototransistor Optocoupler  
High Density Mounting Type  
Data Sheet  
Features  
Current Transfer Ratio  
(CTR: min. 50% at I = 5 mA,  
F
V
CE  
= 5 V)  
High input-output isolation voltage  
(V = 5000 Vrms)  
Description  
Ordering Information  
Specify part number followed by  
Option Number (if desired).  
iso  
The HCPL-817 contains a light  
emitting diode optically coupled to  
a phototransistor. It is packaged in  
a 4-pin DIP package and available  
in wide-lead spacing option and  
lead bend SMD option. Input-output  
isolation voltage is 5000 Vrms.  
Response time, t , is typically 4 µs  
and minimum CTR is 50% at input  
current of 5 mA.  
Response time (t : typ., 4 µs at  
r
V
CE  
= 2 V, I = 2 mA, R = 100 )  
C L  
Compact dual-in-line package  
UL approved  
CSA approved  
IEC/EN/DIN EN 60747-5-2 approved  
Options available:  
– Leads with 0.4" (10.16 mm)  
spacing (W00)  
– Leads bends for surface  
mounting (300)  
– Tape and reel for SMD (500)  
– IEC/EN/DIN EN 60747-5-2  
approvals (060)  
HCPL-817-XXXX  
Option Number  
060 = IEC/EN/DIN EN 60747-5-2  
Option  
W00 = 0.4" Lead Spacing Option  
300 = Lead Bend SMD Option  
500 = Tape and Reel Packaging  
Option  
00A = Rank Mark A  
00B = Rank Mark B  
00C = Rank Mark C  
r
00D = Rank Mark D  
00L = Rank Mark L  
Functional Diagram  
Applications  
XXXE = Lead Free Option  
Signal transmission between  
circuits of different potentials and  
impedances  
PIN NO. AND INTERNAL  
CONNECTION DIAGRAM  
4
3
I/O interfaces for computers  
Feedback circuit in power supply  
Schematic  
I
I
C
1
+
F
4
3
ANODE  
COLLECTOR  
EMITTER  
V
F
1
2
2
CATHODE  
1. ANODE  
3. EMITTER  
2. CATHODE 4. COLLECTOR  
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to  
prevent damage and/or degradation which may be induced by ESD.  

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