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HMNR28DV

更新时间: 2024-02-25 01:13:12
品牌 Logo 应用领域
DLGHANBIT 静态存储器
页数 文件大小 规格书
11页 836K
描述
5.0 or 3.3V, 16K bit (2 Kbit x 8) TIMEKEEPER NVSRAM

HMNR28DV 数据手册

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DLGHANBIT  
DLGHANBIT Confidential  
HMNR28D(V)  
5.0 or 3.3V, 16K bit (2 Kbit x 8) TIMEKEEPER NVSRAM  
Part No. HMNR28D(V)  
GENERAL DESCRIPTION  
The HMNR28D(V) TIMEKEEPER SRAM is a 2Kb x 8 non-volatile static RAM and real time clock organized as 2,048  
words by 8 bits. The special DIP package provides a fully integrated battery back-up memory and real time clock solution.  
The HMNR28D(V) directly replaces industry standard 2Kbit x 8 SRAMs. It also provides the non-volatility of Flash without  
any requirement for special WRITE timing or limitations on the number of WRITEs that can be performed.  
FEATURES  
INTEGRATED LOW POWER SRAM, REAL TIME CLOCK, POWER-FAIL CONTROL CIRCUIT, BATTERY and  
CRYSTAL  
BCD CODED YEAR, MONTH, DAY, DATE, HOURS, MINUTES, and SECONDS  
AUTOMATIC POWER-FAIL CHIP DESELECT and WRITE PROTECTION VOLTAGES :  
(VPFD = Power-fail Deselect Voltage)  
HMNR28D : VCC = 4.5 to 5.5V  
4.1V VPFD 4.5V  
HMNR28DV: VCC = 3.0 to 3.6V  
2.7V VPFD 3.0V  
CONVENTIONAL SRAM OPERATION : UNLIMITED WRITE CYCLES  
SOFTWARE CONTROLLED CLOCK CALIBRATION FOR HIGH ACCURACY APPLICATIONS  
5 YEARS OF DATA RETENTION and CLOCK OPERATION IN THE ABSENCE OF POWER PIN and FUNCTION  
COMPATIBLE WITH INDUSTRY STANDARD 2K x 8 SRAMS  
SELF-CONTAINED BATTERY and CRYSTAL IN DIP PACKAGE  
OPTIONS  
Timing  
70 ns  
MARKING  
PIN ASSIGNMENT  
-70  
-85  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
DQ0  
DQ1  
DQ2  
Vss  
Vcc  
A8  
A9  
1
2
3
4
24  
23  
22  
21  
85 ns  
/WE  
/OE  
A10  
/CE  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
5
6
7
8
20  
19  
18  
17  
16  
15  
14  
13  
9
10  
11  
12  
24-pin Encapsulated Package  
URL : www.dlghb.co.kr  
Rev. 1.3 (Apr, 2009)  
1
DLG HANBIT Co.,Ltd  

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