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HMN5128DVLF-85 PDF预览

HMN5128DVLF-85

更新时间: 2024-10-15 02:51:55
品牌 Logo 应用领域
DLGHANBIT 静态存储器
页数 文件大小 规格书
6页 564K
描述
Non-Volatile SRAM MODULE 4Mbit (512K x 8-Bit),32Pin-DIP, 3.3V

HMN5128DVLF-85 数据手册

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DLGHANBIT  
DLGHANBIT Confidential  
HMN5128DV  
Non-Volatile SRAM MODULE 4Mbit (512K x 8-Bit),32Pin-DIP, 3.3V  
Part No. HMN5128DV  
GENERAL DESCRIPTION  
The HMN5128DV Nonvolatile SRAM is a 4,194,304-bit static RAM organized as 524,288 bytes by 8 bits.  
The HMN5128DV has a self-contained lithium energy source provide reliable non-volatility coupled with the unlimited write  
cycles of standard SRAM and integral control circuitry which constantly monitors the single 3.3V supply for an out-of-  
tolerance condition. When such a condition occurs, the lithium energy source is automatically switched on to sustain the  
memory until after Vcc returns valid and write protection is unconditionally enabled to prevent garbled data. In addition the  
SRAM is unconditionally write-protected to prevent an inadvertent write operation. At this time the integral energy source is  
switched on to sustain the memory until after VCC returns valid.  
The HMN5128DV uses extremely low standby current CMOS SRAM’s, coupled with small lithium coin cells to provide non-  
volatility without long write-cycle times and the write-cycle limitations associated with EEPROM.  
FEATURES  
Access time : 70, 85ns  
PIN ASSIGNMENT  
High-density design : 4Mbit Design  
Battery internally isolated until power is applied  
Industry-standard 32-pin 512K x 8 pinout  
Unlimited write cycles  
A18  
A16  
A14  
A12  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
DQ0  
DQ1  
DQ2  
VSS  
VCC  
A15  
A17  
/WE  
A13  
A8  
A9  
A11  
/OE  
A10  
/CE  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
32  
31  
30  
29  
Data retention in the absence of VCC  
5-years typical data retention in absence of power  
Automatic write-protection during power-up/power-down  
cycles  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
Data is automatically protected during power loss  
Conventional SRAM operation; unlimited write cycles  
OPTIONS  
Timing  
70 ns  
MARKING  
32-pin Encapsulated Package  
-70  
-85  
85 ns  
URL : www.dlghb.co.kr  
Rev.1.3 (Apr. 2009)  
1
DLG HANBIT Co.,Ltd  

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