0.1 GHz to 6.0 GHz,0.5 dB LSB, 6-Bit,
GaAs Digital Attenuator
Data Sheet
HMC624A
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Attenuation range: 0.5 dB (LSB) steps to 31.5 dB
Low insertion loss: 1.6 dB at 3 GHz
Excellent attenuation accuracy
24
23
22
21
20
19
P/S
CLK
1
2
3
4
5
6
18 VDD
High linearity
PUP1
17
16
15
14
13
Input 0.1dB compression (P0.1dB): 33 dBm typical
Input third-order intercept (IP3): 55 dBm typical
High RF input power handling: 28 dBm
Low phase shift: 25° at 3 GHz
Single-supply operation: 3 V to 5 V
CMOS-/TTL-compatible control
SERIAL/
PARALLEL
INTERFACE
PUP2
SERIN
LE
SEROUT
GND
6-BIT/
DIGITAL
ATTENUATOR
GND
ATTOUT
ATTIN
24-lead, 4 mm × 4 mm LFCSP package
Pin compatible to the HMC1122
7
8
9
10
11
12
PACKAGE
BASE
APPLICATIONS
GND
Cellular infrastructure
Microwave radios and very small aperture terminals (VSATs)
Test equipment and sensors
Figure 1.
Intermediate frequency (IF) and radio frequency (RF) designs
GENERAL DESCRIPTION
The HMC624A is a 6-bit digital attenuator with a 31.5 dB
attenuation control range in 0.5 dB steps.
serial output port for cascading other serial controlled
components.
The HMC624A offers excellent attenuation accuracy and high
input linearity over the specified frequency range from 100 MHz
to 6.0 GHz. However, this digital attenuator features external ac
grounding capacitors to extend the operation below 100 MHz.
The HMC624A operates with a single positive supply voltage
from 3 V to 5 V, and provides a CMOS-/TTL-compatible
control interface.
The HMC624A comes in a RoHS compliant, compact, 4 mm ×
4 mm LFCSP package, and is pin compatible to the HMC1122
except for the ACGx pins.
The HMC624A is integrated with two dies: a CMOS driver and
a gallium arsenide (GaAs) RF attenuator. The CMOS driver
provides both serial and parallel control of the RF attenuator.
The device also features a user-selectable power-up state and a
Rev. B
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